OCR A Level Computer Science (H446) - Component 1.1.2 - Types of Processor

Front

Several CISC instructions may be equivalent to a single RISC instruction

Back

FALSE

Front

CISC aims to improve processing time by increasing the number of instructions understood by the CPU in the instruction set.

Back

TRUE

Front

CISC aims to use as few lines of assembly code as possible, even if more clock cycles are needed as a result.

Back

TRUE

Front

RISC aims to improve processing speed by simplifying instructions so that one line takes one clock cycle.

Back

TRUE

Front

RISC code may have fewer lines of code, but will take more processor time.

Back

FALSE

Front

CISC code may have fewer lines of code, but will take more processor time.

Back

TRUE

Front

RISC code may have more lines of code than the CISC equivalent

Back

TRUE

Front

CISC code can better utilise pipe-lining as the time needed for each operation can be predicted.

Back

FALSE

Front

RISC code can better utilise pipe-lining as the time needed for each operation can be predicted.

Back

TRUE

Front

A dual core system is always twice as fast as a single core system.

Back

FALSE