1.1.2 Von Neumann Architecture

The Memory Address Register (MAR) holds ...........

• Location of the CPU

• Location in memory of the instruction to be fetched or stored

• Location of the RAM

• Location of the data

Which register is responsible for temporarily storing the data or program instruction fetched from memory

• Memory Address Register

• Program Counter

• Accumulator

• Memory Data Register

Which register is responsible for storing the mathematical and logical calculations

• Memory Address Register

• Program Counter

• Accumulator

• Memory Data Register

Which register is responsible for holding the memory address location of the next instruction

• Memory Address Register

• Program Counter

• Accumulator

• Memory Data Register

Which register is responsible for holding the address of the instruction to be fetched or stored?

• Memory Address Register

• Program Counter

• Accumulator

• Memory Data Register

True or False, the Arithmetic and Logic Unit is linked directly to the Accumulator?

• True

• False

True or False, the buses are responsible for communicating the data transfer between the CPU and the Main Memory (RAM)

• True

• False

Which of the buses is responsible for carrying the address from the processor to memory or input/output devices?

• Address

• Control

• Data

Which of the buses is responsible for sending the data between the processor, memory and input/output devices?

• Address

• Control

• Data

Which of the buses is responsible for communicating with the memory to tell it to either read or write the instructions?

• Address

• Control

• Data