
1.1.2 Von Neumann Architecture
Authored by Mr Bolton
Computers
1st - 10th Grade
Used 144+ times

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10 questions
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1.
MULTIPLE CHOICE QUESTION
20 sec • 1 pt
The Memory Address Register (MAR) holds ...........
Location of the CPU
Location in memory of the instruction to be fetched or stored
Location of the RAM
Location of the data
2.
MULTIPLE CHOICE QUESTION
20 sec • 1 pt
Which register is responsible for temporarily storing the data or program instruction fetched from memory
Memory Address Register
Program Counter
Accumulator
Memory Data Register
3.
MULTIPLE CHOICE QUESTION
10 sec • 1 pt
Which register is responsible for storing the mathematical and logical calculations
Memory Address Register
Program Counter
Accumulator
Memory Data Register
4.
MULTIPLE CHOICE QUESTION
10 sec • 1 pt
Which register is responsible for holding the memory address location of the next instruction
Memory Address Register
Program Counter
Accumulator
Memory Data Register
5.
MULTIPLE CHOICE QUESTION
10 sec • 1 pt
Which register is responsible for holding the address of the instruction to be fetched or stored?
Memory Address Register
Program Counter
Accumulator
Memory Data Register
6.
MULTIPLE CHOICE QUESTION
5 sec • 1 pt
True or False, the Arithmetic and Logic Unit is linked directly to the Accumulator?
True
False
7.
MULTIPLE CHOICE QUESTION
10 sec • 1 pt
True or False, the buses are responsible for communicating the data transfer between the CPU and the Main Memory (RAM)
True
False
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