
1.1.4 Fetch Decode Execute Cycle
Authored by Mr Bolton
Computers
1st - 10th Grade
Used 93+ times

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10 questions
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1.
MULTIPLE CHOICE QUESTION
10 sec • 1 pt
What was the name of the Scientist who created the Fetch, Decode, Execute Cycle
Van Neumann
Vin Neumann
Von Neumann
Von Newman
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
True or False, instructions are fetched from the CPU
True
False
3.
MULTIPLE CHOICE QUESTION
10 sec • 1 pt
The main memory is more commonly called the what?
ROM
RON
RAN
RAM
4.
MULTIPLE CHOICE QUESTION
10 sec • 1 pt
RAM stands for?
Random Access Memory
Read Access Memory
Read Any Memory
Random Access Management
5.
MULTIPLE CHOICE QUESTION
20 sec • 1 pt
Which 2 registers are responsible for processing the address of the next instruction to be executed?
PC and the MDR
MDR an the MAR
CI and the MAR
PC and the MAR
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
The instructions that the PC indicates to be fetched are stored in which register?
MAR
MDR
PC
CI
7.
MULTIPLE CHOICE QUESTION
20 sec • 1 pt
The contents of the MDR are copied to which register?
MDR
MAR
CI
PC
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