Quiz Chapter 2

For the circuit shown, the PIV will occur when the input waveform is at point

• A

• B

• C

• D

The circuit shown is a

• half-wave rectifier

• full-wave rectifier

• bridge rectifier

• none of the above

The PIV for the circuit shown is equal to

• Vp(sec)/2

• Vp(sec)

• 2Vp(sec)

• none of the above

During the positive input cycle shown, the conduction path is through diodes

• D1 and D2

• D3 and D4

• D1 and D4

• D2 and D3

The formula to calculate the load regulation is,

• 
• 
• 
• 

The bias voltage is set to +4.3 V. The output of the biased limiter shown will be clipped

• above +3.6 V

• below +3.6 V

• above +5.0 V

• below +5.0 V

The bias voltage is set to +4.3 V. The output of the biased limiter shown will be clipped

• above +3.6 V

• below +3.6 V

• above +5.0 V

• below +5.0 V

The circuit shown is a

• negative clipping circuit

• positive clipping circuit

• negative clamping circuit

• positive clamping circuit

The circuit shown is a

• full-wave rectifier

• full-wave voltage doubler

• positive clamping circuit

• negative clamping circuit

A diode abbreviation that means the same thing as the PIV is the

• VRRM

• VRSM

• IO

• IFSM