Each device in MSP430 will have

• Unique 16 bit address

• Unique 8 bit address

• Either 16bit or 8 bit address

• None

MSP430 families address space is configured in

____architecture

• Harvard

• Von-Neumann

• RISC

• CISC

The typical operating voltage range of MSP430 is:

• 1.8 to 3.6 V

• 0 to 5V

• 3.3 to 5V

• 5 to 12V

The watchdog counts up and resets the MSP430 when it reaches the limit?

• true

• false

• cannot be said

• depends on the condition

Which of the following registers in the MSP430 controls the

directionality of bi-directional pins in Port 1

• P1OUT

• P1DIR

• P1REN

• P1IN

Which one is the function of Watchdog timer ？

• detect success

• watch the door

• self-reset

One of them is not MSP430 clock resource--

• First LF (32.767KHz) /XT (8MHz)

• Second LF/XT2

• ACLK clock, MCLK, SMCLK clock

• DCO RC clock resource 10KHz

The purpose of Phase Lock Loop (PLL) in Micro controllers is to--

• Multiply Clock

• Divide Clock

• Control Interrupts

• Control Timers

The width of the PC in MSP430 is

• 16

• 8

• 20

• 24

How many registers are available in MSP430?

• 16

• 12

• 8

• 32