ARM1_30.03.21

The ARM core uses ____ Architecture

• RISC

• CISC

• Both

• none

ARM Processor specifically designed for to reduce ___

• Size.

• Power Consumption

• both

• none

ARM Processor core is a key component of ___ bit embedded system.

• 8

• 16

• 32

• 64

RISC Philosophy implemented with ___ major deign goals.

• 4

• 6

• 8

• 16

____ is the processing of instruction broken down to smaller unit.

• Pipeline

• ALU

• MCU

• All

Register contains ___

• Address

• data

• both

• none

___ Instruction used to transfer the data between register and memory.

• Load

• store

• both

• none

The design rule s allow a RISC to be __

• simpler

• complicated

• both

• none

ARM means ___

• Advance RISC Machine

• Advance Review machine

• Advance RISC mechanism

• d) All

RISC means ____

• Reduced Instruction set computer

• Reduced Instruct set computer

• both

• None