2nd week

In Back-end design which timing violation has more priority? Why?

• Setup, because setup timing already exists during Place stage

• Hold, because hold violation is related to data path and no depends on clock; where setup can be eliminated by slowing the clock.

• Setup, because setup related to clock and clock frequency cannot be adjusted

• Hold, because setup can clean up easily by pushing clock

What is slack?

Hint: The time difference between _____ and _____ time ?

What is the routing components?

• Logical connection and metal layers

• metal layers and vias

• Logical connection, vias and metal layers

One of the DRC violations is short. What does it mean by 'short'?

Routing blockage is one of the routing constraint. True or false?

• True

• False

From the NDR name specified in below command, can you guess what are the rules being applied to the net?

set_routing_rule [get_nets netA] -rule Track2X_Wide1X_Metal_With_Shield

• Double spacing, single width and shielding

• Single spacing, single width and shielding

• Double spacing and single width

• Double spacing, double width and shielding

What is the specific goal of Search and Repair by route_detail?

• To reduce DRC

• To reduce IR drop

• To reduce EM violations

• None of the above

Please list out one of the solution to fix Antenna violations

What is the purpose of tap cells? (Choose more than 1 answer)

• Avoid latch up

• Maintain VDD and VSS NWELL continuity

• prevent DRC violations

• prevent Antenna

How many types of Physical Verification we have? (Choose more than 1 answer)

• CbTileANT

• CbTileLVS

• CbTileEDRC

• CbTileDRC

• CbTileMiniEDRC