CEA201_Part2_Chap04

What is the high speed memory between the main memory and the CPU called?

• Register Memory
• Cache Memory
• Storage Memory
• Virtual Memory

Cache Memory is implemented using the DRAM chips.

• True
• False

 Whenever the data is found in the cache memory it is called as _________

• HIT
• MISS
• FOUND
• ERROR

LRU stands for ___________

• Low Rate Usage
• Least Rate Usage
• Least Recently Used
• Low Required Usage

When the data at a location in cache is different from the data located in the main memory, the cache is called _____________

• Unique
• Inconsistent
• Variable
• Fault

Which of the following is not a write policy to avoid Cache Coherence?

• Write through
• Write within
• Write back
• Buffered write

Which of the following is an efficient method of cache updating?

• Snoopy writes
• Write through
• Write within
• Buffered write

In ____________ mapping, the data can be mapped anywhere in the Cache Memory.

• Associative
• Direct
• Set Associative
• Indirect

The number of sign bits in a 32-bit IEEE format is ____

• 1
• 11
• 9
• 23

The transfer between CPU and Cache is ______________

• Block transfer
• Word transfer
• Set transfer
• Associative transfer