What does MESI stand for?

• modified exclusive state invalid

• modified exclusive shared invalid

• modified exclusive system input

• modified embedded shared invalid

SISD means _______

• Single Information Single Design

• Single Instruction Single Data

• Single Instruction Single Design

• Single Information Single Document

Identify how the potential parallelism among instructions is

exploited _____

• Pipelining

• Scalability

• Supervision

• Compatibility

In a Symmetric multiprocessor (SMP), the memory access time to

any region of memory is validated ______

• differently for each processor.

• uniquely for each processor.

• approximately same for each processor

• statically for each processor

When a processor with coarse-grained multithreading issues

instructions from a single thread and a stall occurs, the pipeline must

be __________

• a)emptied

• b)frozen

• either a or b

• both a and b

What is the collection of independent uniprocessors interconnected

together identified as?

• instruction stream

• control unit

• cluster

• NUMA

Choose which of the following can be considered as an advantage of

SMP over uniprocessor?

• availability

• reliability

• maintainability

• serviceability

When a data item can be moved to a local cache and used there in a

transparent fashion it is termed as _______

• migration

• replication

• synchronization

• serialization

Determine what lead to the development of MESI protocol?

• cache size

• cache coherency

• bus snooping

• number of caches

Hardware multithreading increases utilization of a processor by

switching to another thread when ______

• one thread is running

• one thread is stalled

• multiple threads are running

• multiple threads are stalled