QUIZ-1
Authored by RAVI KUMAR SARIKI
Education
University
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10 questions
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1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which IC technology consumes less Power
Bipolar
BiCMOS
CMOS
ECL
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which IC technology has high input impedance?
Bipolar
BiCMOS
CMOS
ECL
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
PMOS devices are formed in
n-type substrate of moderate doping level
n-type substrate of low doping level
p-type substrate of high doping level
n-type substrate of high doping level
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Terminal contacts in MOS fabrication is formed using which procedure
Lithography
Diffusion
Passivation
Metallization
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
During which processing step a glass like protective layer is formed around IC ?
Lithography
Passivation
Diffusion
Doping
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
During which one of the following conditions NMOS transistor is non saturation region
Vds = Vgs –Vt
Vgs < Vt
Vds < Vgs –Vt
Vds > Vgs –Vt
7.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
In MOS transistors_______ is used for their gate
metal
silicon-dioxide
gallium
polysilicon
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