The logic family which consumes least power

• ECL

• TTL

• MOS

• CMOS

Fastest saturated logic family

• MOS
• CMOS
• ECL
• TTL

Logic Family which has highest fan out

• CMOS
• TTL
• ECL
• MOS

The output of clocked sequentail circuit is independent of the input. The circuit can be represented by

• Both Mealy nor Moore Model
• Mealy Model
• Moore Model
• Neither Mealy nor Moore Model

A sequential circuit with 10 states will have ________ number of Flip Flops

• 5
• 4
• 10
• 3

Assume that a 4 bit ripple counter is holding the count 0100. What will be count after 29 pulses

• 0100

• 0110

• 0011

• 0001

Maximum that can be obtained by ripple counter using five flip flops is

• 5
• 31
• 16
• 32

An input 0100 is allowed to enter a 4 bit JK Flip Flip Serial In Parallel Out (Shift) Regsiter. Consider initially all Flip Flops are cleared before the input is given. What is the output after 5 clock pulses

• 0010

• 0100

• 0111

• 0001

UART stands for

• United Anonmymous Reciever and Transmitter
• Universal Asynchrnous Return and Tracking
• Universal Asynchrnous Reject and Transmitter
• Universal Asynchrnous Reciever and Transmitter

For Truth Table, A & B are the input Q is output, Identify the Latch : 1) A=0 , B=0 Q= Invalid 2) A=0, B=1 Q=1 3) A=1 ,B=0 Q=0 4) A=1, B=1 Q= No Change

• NOR S R

• NAND S R

• NAND J K

• NOR J K