CPA102-FINALS-EXAM-REVIEWER

1. Which of the following is true about De Morgan's Law?

• AB = not(not(A)*not(B))

• A + B = not(AB)

• AB = not(not(A)+not(B))

• A + B = not(not(A)*not(B))

Which of the following is NOT true about TTL?

• TTL is less sensitive to damage from electrostatic discharge than early CMOS devices

• TTL is substantially faster than ECL.

• TTL uses less power and has easier design rules.

• TTL is particularly well suited to bipolar integrated circuits

Which of the following is not an advantage of an ECL?

• Changes state quickly

• High gate delay

• High Fan out

• Constant current draw of the differential amplifiers minimizes delays and glitches due to supply-line inductance and capacitance

Class of digital circuits built with multiple collector bipolar junction transistors.

• TTL

• RTL

• IIL

• DTL

5. Depletion mode MOSFET acts mostly as

• a JFET

• a voltage source

• a resistor

• enhancement mode MOSFET

It is the delay offered by a gate for the signal appearing at its input, before it reaches the gate output.

• Fan out

• Gate delay

• Noise margin

• propagation delay

What kind of logic gate is the CMOS below?

• OR gate

• NOT gate

• NOR gate

• NAND gate

It is developed at Fairchild Semiconductor for the Apollo Guidance Computer in 1962 and built using resistors as the input network and bipolar junction transistors (BJTs) as switching devices

• TTL

• RTL

• IIL

• DTL

Which o the following is true about CMOS?

• P-type pulls output voltage UP when input is zero.

• N-type pulls output voltage UP when input is zero.

• P-type pulls output voltage DOWN when input is zero.

• N-type pulls output voltage DOWN when input is zero.

What is the type of the inversion layer?

• P-type

• N-type

• C-type

• PN-type