coa week 3

Instruction cycle is divided into two stages, which are...

• Control

• Fetch

• Execute

Which phase of the instruction execution cycle involves determining the memory address of the next instruction to be executed?

• Fetch

• Decode

• Execute

• Store

The address of instruction is stored in instruction register

• True

• False

The processor interprets the instruction and performs the required action. In general, these actions fall into...

• processor-memory

• processor-I/O

• control

• interrupt

• data processing

Perform the operation indicated in the instruction is the definition of..

• operand fetch

• operand store

• data operation

• instruction fetch

Which of the following best defines an interrupt in a processor?

• A mechanism for a program to halt its execution voluntarily

• A signal generated by hardware or software indicating an event that needs immediate attention

• A method to speed up the processor's clock frequency

• A type of cache memory used to store frequently accessed instructions

What triggers a hardware interrupt in a processor?

• A specific instruction in the code

• A malfunction in the processor's arithmetic logic unit (ALU)

• An external device signaling the processor to pause its current operation

• The completion of an instruction execution

Two strategies to handle multiple interrupts are...

• Disabled Interrupt

• Interrupt Nesting

• Priority Interrupts

Which of the following is NOT one of the types of buses?

• Control Bus

• Utility Bus

• Data Bus

• Address Bus

_____ used to designate the source or destination of the data on the data bus

• Data Bus

• Address Bus

• Control Bus