Digital Quiz 3

The 5-bit 2's complement of -12 is:

• A.) 10100

• B.) 11100

• C.) 01100

• D.) 00100

Answer explanation

16 8 4 2 1

1 0 1 0 0

- 16 + 4 = - 12

Assume the binary number 1001 is in sign-magnitude form. Its decimal value is:

• A.) 1

• B.) -1

• C.) 9

• D.) -7

Answer explanation

8 4 2 1

1 0 0 1

• - 1

= -1

The MSB denotes the sign for the number

What range of decimal numbers can be represented in 4 bits in the sign magnitude system?

• A.) -8 to +8

• B.) -7 to +7

• C.) 0 to 15

• D.) None of the above

Answer explanation

1 1 1 1 = -7

0 1 1 1 = +7

What range of decimal numbers can be represented in 4 bits in the 2's complement system?

• A.) -7 to +7

• B.) -8 to +8

• C.) -16 to +15

• D.) -8 to +7

Answer explanation

1 0 0 0 = -8

0 1 1 1 = +7

Assuming the following two numbers are ALREADY in 2's complement, (0101, 1110). If you add them using the 2's complement system the sum is:

• A.) 0011

• B.) 10011

• C.) Overflow

• D.) None of the above

Answer explanation

0 1 0 1 + 1 1 1 0 = 1 0 0 1 1

drop MSB since we're only working with 4 bits

so answer is 0 0 1 1

Assuming the following two numbers are ALREADY in 2's complement, (0101, 0110). If you add them using the 2's complement system the sum is:

• A.) 1011

• B.) 0001

• C.) Overflow

• D.) None of the above

Answer explanation

0 1 0 1 + 0 1 1 0 = 1 0 1 1

Two positive numbers cannot equal a negative when added. The positive number 11 cannot be represented with this many bits so the answer is

Overflow

C5_h + AF_h = _____

• A.) 174_h

• B.) 1CF_h

• C.) 1A4_h

• D.) 14A_h

Answer explanation

C5_h - AD_h = _____

• A.) 12h

• B.) 28h

• C.) 18h

• D.) None of the above

Answer explanation

How many inputs must a full-adder have?

• A.) 2

• B.) 3

• C.) 4

• D.) 5

Answer explanation

A full adder circuit is central to most digital circuits that perform addition or subtraction.

It is so called because it adds together two binary digits, plus a carry-in digit (inputs) to produce a sum and carry-out digit (outputs).

It therefore has three inputs and two outputs.

The circuit for a half-adder (adds two bits and outputs the sum and carry) is: (HINT: Design it from the truth table if you don't know the answer).

• A.) Two XOR gates

• B.) An XOR gate in parallel with an AND gate

• C.) An XOR gate in series with an AND gate

• D.) An XOR gate in parallel with an OR gate

Answer explanation