Assesment:One-Week ATAL FDP On “Recent Advancements in VLSI

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University
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Dhanekula ECE HoD
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25 questions
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1.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
1. In IC fabrication process, at what temperature soft bake process is performed and select its purpose
300C to 600C and to apply extra photoresist
900C to 1000C and to remove the residual solvents of the photoresist
1800C to 2000C and to perform lithography
1200C to 1600C and to perform annealing
2.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
2. Select appropriate dynamic power expression.
a. PD = CL VDD2 fclk
a. PD = RL VDD fclk
a. PD = CL VDD2 fclk2
a. PD = RL VDD2 fclk
3.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
3. Issue arises out of Clock Domain Crossing (CDC) check
Data Loss
Glitches
Both a&b
LVS error
4.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
4.Power dissipation is directly related to.
Frequency of operation
Square of VDD
Both a & b
Amplitude of input signal
5.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
5.Dynamic power in VLSI circuits depends on the following parameters
Supply voltage
Bit transition
Time to market
Both a & b
6.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
6.Static power dissipation can be optimized by employing
Capacitance compensation technique
Clock gating technique
Pipelining technique
Parallel architecture technique
7.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
7.Main parameter to be considered for reduction of power dissipation
Static power dissipation
Dynamic power dissipation
Leakage power dissipation
Both b & c
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