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Quiz 2

Authored by EC24D0007 FERIDINAND T

Design

University

Used 8+ times

Quiz 2
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10 questions

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1.

MULTIPLE CHOICE QUESTION

10 sec • 1 pt

What is the architecture used in Embedded system

Von Neumann architecture

Graphics architecture

Harvard Architecture

EPIC Architecture

2.

MULTIPLE CHOICE QUESTION

10 sec • 1 pt

What is the memory size of RAM and ROM of Cortex-M processor respectively

(256 & 32) kibibytes

(32 & 256) kibibytes

(16 & 32) kibibytes

(32 & 16) kibibytes

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

How many buses are used for data and instruction in the Cortex-M processor is

5

4

3

2

4.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

In Embedded Systems Design, interface latency is

The worst-case upper bound on the time required to perform the input sequence

The worst-case a lower bound on the time required to perform the input sequence

The best-case upper bound on the time required to perform the input sequence

The best-case and lower bound on the time required to perform the input sequence

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What is the size of the general-purpose CPU register?

4 bits

8 bits

16 bits

32 bits

6.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

The control input to the servo motor is _______a signal

Amplitude Modulation

Frequency Modulation

Pulse Width Modulation

None of the above

7.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What is the pulse duration for the 90-degree rotation of the servo motor?

1.7 msec

1.5 msec

2.3 msec

0.7 msec

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