
CO_CSE1_Quiz1
Quiz
•
Computers
•
University
•
Practice Problem
•
Hard
Surjeet Kaur
FREE Resource
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15 questions
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1.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
For a binary half-adder having two inputs A and B, the correct set of logical outputs S(=A+B) and C (carry) are
S=AB + A’B C=A’B
S=A’B + AB’ C=AB’
S=A’B + AB’ C=AB
S=A’B’ + AB C=AB
2.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
In 2’s complement addition, overflow
a) Is flagged whenever there is carry from sign bit addition
b) Cannot occur when a positive value is added to a negative value
c) Is flagged when the carries from sign bit and previous bit matches
d) None of the above
3.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
In the absolute addressing mode
a) The operand is inside the instruction
b) The address of the operand is inside the instruction
c) The register containing the address of the operand is specified inside the instruction
d) The location of the operand is implicit
4.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
The function represented by the given K-map is
A.B
AB+BC+CA
d) None of the above
5.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
Which register holds the operand read from the memory?
a) Input register
b) Data register
c) Temporary register
d) Accumulator
6.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
The minterm expansion of f(P,Q,R)=PQ+QR'+PR' is
a) m2+m4+m6+m7
b) m0+m1+m3+m5
c) m0+m1+m6+m7
d) m2+m3+m4+m5
7.
MULTIPLE CHOICE QUESTION
1 min • 1 pt
Any combinational circuit can be designed using only
a) AND gates
b) NAND gates
c) OR gates
d) XOR gates
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