CO_CSE1_Quiz1

For a binary half-adder having two inputs A and B, the correct set of logical outputs S(=A+B) and C (carry) are

• S=AB + A’B C=A’B

  
  

• S=A’B + AB’       C=AB’

  
  

• S=A’B + AB’      C=AB

• S=A’B’ + AB       C=AB

In 2’s complement addition, overflow

• a) Is flagged whenever there is carry from sign bit addition

• b) Cannot occur when a positive value is added to a negative value

• c) Is flagged when the carries from sign bit and previous bit matches

• d) None of the above

In the absolute addressing mode

• a) The operand is inside the instruction

• b) The address of the operand is inside the instruction

• c) The register containing the address of the operand is specified inside the instruction

• d) The location of the operand is implicit

The function represented by the given K-map is

• A.B

• AB+BC+CA

• 
• d) None of the above

Which register holds the operand read from the memory?

• a) Input register

• b) Data register

• c) Temporary register

• d) Accumulator

The minterm expansion of f(P,Q,R)=PQ+QR'+PR' is

• a) m2+m4+m6+m7

• b) m0+m1+m3+m5

• c) m0+m1+m6+m7

• d) m2+m3+m4+m5

Any combinational circuit can be designed using only

• a) AND gates

• b) NAND gates

• c) OR gates

• d) XOR gates

Identify the odd one out

• a) Decoder

• b) Multiplexer

• c) Counter

• d) Encoder

How many 2-input NAND gates are required to realize XNOR gate?

• a) 3

• b) 4

• c) 5

• d) 6

The Boolean function x’y’+xy+x’y is equivalent to

• a) x’+y’

• b) x+y

• c) x+y’

• d) x’+y