Chiplab Induction

What is the 5th Letter in the Alphabet?

• A

• C

• D

• E

What is ChipLab's Mission

• Create a microship

• revolutionize the semiconductor landscape

• Train graduates

• Make chips in Nigeria

Which is NOT a Value of ChipLab?

• Sacrifice for Greater Good

• Commitment to Teamwork

• Trust and Reliability

• Unwavering Support for Others

Answer explanation

Trust and Reliabilty is our Culture

Cadence and Synopsis are Open Source Tools

• TRUE

• FALSE

Answer explanation

Cadence and Synopsus are premium EDA (Electronic Design Automation) solutions

In soft blockage ____ cells are placed

• only sequencial cells

• only buffer and inverters

• all cells

• none

The final output of functional verification phase is _____

• A complete physical chip

• A verified and validated design

• A fabricated ASIC

• A packaged and tested chip

The gate region consists of ____________

• insuating layer

• conducting layer

• lower metal layer

• p type layer

What is the purpose of floor planning in physical design?

• Checking for design rule violations

• Optimizing power consumption

• Defining the size and position of different blocks in the chip

• Testing the functionality of the chip

The fastest logic family is

• CMOS

• NMOS

• TTL

• ECL

Elecromigration can be reduced by 

• increasing the width

• increasing the spacing between nets

• increasing width AND spacing between nets

• blockages