The Fetch-Decode-Execute Cycle Bitesize

The Fetch-Decode-Execute Cycle Bitesize

11th Grade

10 Qs

quiz-placeholder

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The Fetch-Decode-Execute Cycle Bitesize

The Fetch-Decode-Execute Cycle Bitesize

Assessment

Quiz

Computers

11th Grade

Hard

Created by

M Ellis

Used 5+ times

FREE Resource

10 questions

Show all answers

1.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What architecture provides the basis for the majority of computers used today?

Harvard architecture

RISC architecture

Quantum architecture

Von Neumann architecture

2.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What is the first step in the fetch-decode-execute cycle?

The memory address is copied into the MAR

The processor sends a signal along the address bus

The instruction is executed

The instruction/data is sent along the data bus to the MDR

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What does MAR stand for?

Main Address Register

Memory Access Register

Main Access Register

Memory Address Register

4.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What happens after the memory address is copied into the MAR?

Data is transferred to the specified address

The instruction/data is decoded

The address in the program counter is incremented

The instruction is executed

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What is the role of the address bus in the fetch-decode-execute cycle?

To request data from an address in memory

To decode the data

To store results of processing

To execute instructions

6.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Where is the instruction/data held before it is copied into the CIR?

ACC

MAR

MDR

Program counter

7.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

What does CIR stand for?

Central Instruction Register

Current Instruction Repository

Control Instruction Register

Current Instruction Register

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