Latch & Flip-flop Quiz

What is the basic function of an SR latch?

• Send emails

• Drive a car

• Cook dinner

• Store one bit of data

Explain the operation of a D flip-flop.

• A D flip-flop operates by outputting the value at the data input on the falling edge of the clock signal.

• A D flip-flop operates by storing the value at the data input indefinitely.

• A D flip-flop operates by toggling the output on every clock cycle.

• A D flip-flop operates by transferring the value at the data input to the output on the rising edge of the clock signal.

What is the advantage of using a JK flip-flop over an SR latch?

• JK flip-flop is slower than SR latch

• JK flip-flop requires more power than SR latch

• JK flip-flop has a toggle functionality which eliminates the possibility of invalid states present in SR latch.

• JK flip-flop is less reliable than SR latch

How does a T flip-flop differ from a D flip-flop?

• A T flip-flop toggles its output, while a D flip-flop changes its output based on the input signal level.

• A T flip-flop is edge-triggered, while a D flip-flop is level-triggered.

• A T flip-flop has two stable states, while a D flip-flop has only one stable state.

• A T flip-flop changes its output based on the input signal level, while a D flip-flop toggles its output.

Describe the working principle of a Master-Slave flip-flop.

• A Master-Slave flip-flop uses two separate flip-flops, one for input control (Master) and one for output control (Slave), with a clock signal to control the timing of input capture and output update.

• A Master-Slave flip-flop uses only one flip-flop for both input and output control

• A Master-Slave flip-flop does not require a clock signal for operation

• A Master-Slave flip-flop has the same input and output control mechanism

What is the significance of an edge-triggered flip-flop?

• It changes its output state only at the rising or falling edge of the clock signal.

• It is not affected by the clock signal

• It changes its output state continuously

• It triggers on every clock cycle

What are the possible states of an SR latch?

• Hold, Toggle

• On, Off

• Start, Stop

• Set, Reset

How does a JK flip-flop handle the '11' input condition?

• Invert the output

• Ignore the input

• Set the output to 0

• Toggle the output state

What is the purpose of the clock signal in a flip-flop?

• To provide power to the flip-flop

• To reset the flip-flop

• To synchronize the changing of the state of the flip-flop with the rest of the system.

• To control the data input of the flip-flop

Explain the concept of metastability in flip-flops.

• Metastability is a term used to describe the stability of flip-flops.

• Metastability is a phenomenon in digital circuits where a flip-flop enters an unpredictable state due to timing violations during input changes close to the clock edge.

• Metastability only occurs in analog circuits, not digital circuits.

• Metastability is a feature that enhances the speed of flip-flops.