
CPE382 Final Exam
Authored by 1728 Jundith Alterado
Computers
University
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28 questions
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1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is Verilog?
A programming language for hardware description
A high-level programming language for software development
A data visualization tool
An operating system
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which of the following represents a hardware component in Verilog?
Module
Function
Loop
Variable
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
In Verilog, what is the purpose of the "always" block?
To declare variables
To instantiates modules
To specify simulation time
To describe behavior using procedural statements
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is the purpose of posedge keyword in Verilog?
To specify a positive edge-triggered flipflop
To specify the negative edge-triggered flip-flop
To specify a synchronous reset
To specify an asynchronous reset
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
How are multi-bit signals represented in Verilog?
As an array of bits.
As separate single-bit signals.
As string of characters.
As floating-point number.
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
How is a Verilog testbench used?
To synthesize hardware designs
To simulate and verify hardware designs
To debug software programs
To measure clock frequency
7.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which RTL description style uses Boolean equations to model
combinational logic?
Behavioral
Dataflow
Structural
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