MCA-S9-ALM-SS-24-25

What is the primary goal of a hierarchical memory system?

• To increase latency

• To reduce access speed

• To provide a balance between speed, cost, and capacity

• To increase energy consumption

Which memory is typically the fastest in a hierarchical memory system?

• a) Cache memory

• b) Main memory

• c) Secondary storage

• d) Register memory

Which principle suggests that programs access a relatively small portion of their address space frequently?

• a) Temporal locality

• b) Spatial locality

• c) The locality principle

• d) Random access

What is a direct-mapped cache?

• a) A cache where each block can be placed in any cache line

• b) A cache where each block has only one possible cache line
  

• c) A fully associative cache
  

• d) A cache with multiple levels

Which cache mapping technique allows a block to be placed in any cache line?

• a) Direct-mapped

• b) Fully associative

• c) Set-associative

• d) Random-mapped

What is a cache conflict?

• A cache conflict occurs when the cache is empty.
• A cache conflict is when memory locations are stored in different cache levels.
• A cache conflict is related to the speed of the cache.
• A cache conflict is when multiple memory locations map to the same cache location.

In a write-back cache strategy, when is data written to the main memory?

• When the CPU requests the data
• When the cache is accessed
• When the cache is initialized
• When the cache block is replaced or evicted

Which cache optimization technique is used to reduce conflict misses?

• Set-Associative Caches
• Direct-Mapped Caches
• Fully-Associative Caches
• Write-Through Caches

What does TCMP stand for?

• Tile-based Chip Memory Process

• Tiled Chip Multicore Processor

• Temporary Cache Management Processor

• Tiled Communication Multicore Processor

What is the purpose of a NoC in TCMP?

• To improve the physical durability of the processing cores
• To provide on chip efficient communication between processing cores

• To regulate power consumption in processing cores
• To enhance the display resolution of the system