Mock Test2

In 16-bit 2’s complement representation, the decimal number -28 is

• 1000 0000 1110 0100

• 0000 0000 1110 0100

• 1111 1111 1110 0100

• 1111 1111 0001 1100

The minters expansion of f(P, Q, R) = PQ + QR’ + PR’ is

•  m2 + m4 + m6 + m7

• m0 + m1 + m3 + m5

• m0 + m1 + m6 + m7

• m2 + m3 + m4 + m5

In the circuit shown, diodes and are ideal, and the inputs and are “0 V” for logic ‘0’ and “10 V” for logic ‘1’. What logic gate does the circuit represent?

• a.3-input OR gate

• 3-input AND gate

• 3-input NOR gate

• 3-input XOR gate

Consider the D-Latch shown in the figure, which is transparent when its clock input CK is high and has zero propagation delay. In the figure, the clock signal CLK1 has a 50% duty cycle and CLK2 is a one-fifth period delayed version of CLK1. The duty cycle at the output latch in percentage is ___________

• 30

• 25

• 35

• 40

A mod-n counter using a synchronous binary up-counter with synchronous clear input is shown in the figure. The value of n is

• 5

• 7

• 15

• 6

A 16 Kb (=16,384 bit) memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number of columns). The minimum number of address lines needed for the row decoder is ____________

• 3

• 128

• 5

• 7

A linear time invariant system has an impulse response of e^2t, t > 0. If the initial conditions are zero and the input is e^3t, what is the output for t > 0?

• e^5t

• e^3t+e^2t

• e^3t−e^2t

• None of the above

In a unity negative feedback system with an open–loop transfer function:

G(s)=K/{s(s+1)}

What should be the gain K for the system to have a damping ratio of 0.25?

• 5

• 2.5

• 4.75

• 4

Change in output of a sensor with change in input is

• A.Resolution

• Sensitivity

• Response

• Selectivity

Which one generally is not desired in sensors

• High Selectivity

• High Sensitivity

• Hysteresis

• Low Response time