CMSC 133 Written Report Compiled Questions

What is a sign of high CPU usage when the computer is idle?

• CPU usage below 10%
• CPU usage above 20%
• CPU usage above 80% only during heavy tasks
• CPU usage fluctuates between 5% and 10%

What is a primary characteristic of superscalar processors?

• A) Execute one instruction at a time
• B) Utilize multiple instruction pipelines
• C) Require only basic scheduling systems
• D) Operate without hardware Dependencies

What enables superscalar processors to execute multiple instructions simultaneously?

• A) Static scheduling
• B) Reduced complexity in design
• C) Single instruction pipelines
• D) Instruction-level parallelism (ILP)

Which feature allows superscalar processors to handle more tasks?

• A) Single instruction pipelines
• B) Simplified control flow
• C) Multiple instruction pipelines
• D) Limited hardware scheduling

What is the role of smart scheduling systems in superscalar processors?

• A) To simplify instruction dependencies
• B) To analyze and resolve instruction dependencies for efficient execution
• C) To increase hardware complexity without improving performance
• D) To reduce parallelism in instruction Execution

What is the purpose of register renaming in superscalar processors?

• A) To eliminate control hazards
• B) To resolve false dependencies like Write-After-Write (WAW)
• C) To simplify the hardware design
• D) To reduce the need for branch Prediction

How does superscalar processing differ from super-pipelining?

• A) Handles parallel instructions
• B) Issues multiple instructions per cycle
• C) Only uses static scheduling
• D) Focuses on dependencies

What is Out-of-Order Execution?

• A) Executing in program order
• B) Executing independently of program order
• C) Avoiding parallelism
• D) Disabling resources

Which dependency is associated with Read-After-Write (RAW) hazards?

• A) True data dependency
• B) Anti-dependency
• C) Output dependency
• D) Resource conflict

What is an example of a resource conflict in superscalar processors?

• A) A procedural branch misprediction
• B) Two instructions requiring the same Arithmetic Logic Unit (ALU)
• C) An instruction waiting for a register to be read
• D) False dependencies due to multiple pipeline registers