DLX Architecture and Floating-Point Arithmetic

What are the main stages of the DLX pipeline, and how do they contribute to instruction execution?

• Fetch, Decode, Execute, Memory Access, Write Back

• Load, Process, Execute, Store, Branch

• Fetch, Decode, Control, Forwarding, Write

• Load, Decode, Execute, Fetch, Terminate

• Fetch, Memory, ALU, Write, Forwarding

How does the DLX architecture handle pipeline hazards, and what techniques are used?

• Using pipelining without hazard detection

• Through speculative execution only

• By data forwarding, stalls, and branch prediction

• By flushing pipelines after every branch instruction

• By executing instructions out of order

What is the role of intermediate pipeline registers (e.g., ID/EX) in the DLX architecture?

• To control memory writes during execution

• To separate and store data between pipeline stages

• To reduce branch hazards

• To directly forward data between stages

• To enhance branch prediction accuracy

What is the significance of IEEE 754 standards in floating-point arithmetic?

• It provides guidelines for fixed-point operations

• It defines formats, biasing, and special values like NaN and infinity

• It eliminates the need for normalization in arithmetic

• It accelerates CPU memory accesses

• It only applies to integer-based arithmetic

Why is normalization important in floating-point arithmetic?

• It increases the size of the exponent field

• It ensures the mantissa uses a single non-zero digit to maximize precision

• It reduces memory consumption for floating-point numbers

• It removes the need for rounding in operations

• It eliminates biasing errors

How does floating-point rounding work, and why is it necessary?

• It truncates the mantissa to the nearest integer value

• It adjusts the mantissa to fit within available bits to minimize errors

• It eliminates all precision loss in calculations

• It is used only for very small numbers

• It prevents hardware overflow errors

What is the main difference between static and dynamic data flow architectures?

• Static uses tokens with context, dynamic uses a single path

• Static has a fixed flow, while dynamic handles multiple tokens with context

• Static allows recursion; dynamic does not

• Static requires data forwarding; dynamic does not

• Dynamic uses fewer computational nodes than static

How does a superscalar processor achieve parallel execution?

• By sequentially fetching instructions

• By using a single ALU for all instructions

• By executing multiple instructions simultaneously with multiple ALUs

• By eliminating all pipeline stalls

• By reducing the size of the instruction cache

What are some challenges associated with superscalar architectures?

• Simplifying forwarding networks for speed

• High complexity, power consumption, and data dependencies

• Eliminating all pipeline hazards

• Achieving perfect cache efficiency

• Minimizing branch prediction errors entirely

What is the function of associative memory in data flow architecture?

• To speed up register accesses in pipelining

• To match incoming data tokens with stored instructions or operands

• To reduce pipeline stalls caused by data hazards

• To predict branches dynamically

• To store intermediate arithmetic results