1.1.2: Types of Processor

What does RISC mean?

• Reduced Instruction Set Computer

• Random Integrated System Chip

• Rapid Information Storage Circuit

• Reliable Internet Service Connection

What does RISC mean?

• Reduced Instruction Set Computer

• Random Integrated System Circuit

• Rapid Information System Control

• Reliable Instruction Set Compiler

What does CISC mean?

• Complex Instruction Set Computer

• Central Integrated System Control

• Computer Information System Code

• Complex Integrated System Circuit

What does CISC mean?

• Complex Instruction Set Computer

• Computer Integrated System Control

• Central Information System Computer

• Complex Integrated System Control

What is a characteristic of RISC architecture?

• Large instruction set

• Each instruction is one line of machine code

• Complex instruction set

• Not used in everyday devices

Which of the following is true about RISC?

• Used only in supercomputers

• Small instruction set

• Requires multiple lines of code per instruction

• Not suitable for everyday devices

RISC architecture is commonly used in which type of devices?

• Only in gaming consoles

• Used in everyday devices

• Only in industrial machines

• Not used in any devices

What are the properties of CISC?

• A large instruction set, instructions are built into hardware, used in embedded systems and microprocessors

• A small instruction set, instructions are software-based, used in personal computers

• A medium instruction set, instructions are built into software, used in gaming consoles

• A large instruction set, instructions are software-based, used in smartphones

What are the benefits of RISC processors?

• Simplified instruction set

• Increased power consumption

• Complex instruction set

• Slower processing speed

What is one of the benefits of RISC processors?

• Pipelining is possible since each instruction takes one clock cycle.

• Instructions are executed in multiple clock cycles.

• Pipelining is not possible due to complex instructions.

• Each instruction requires multiple clock cycles.