Understanding Computer Architecture Concepts

What is the primary difference between RISC and CISC processors?

• RISC processors have a larger set of instructions.

• CISC processors have a smaller set of instructions.

• RISC processors use a reduced set of instructions.

• CISC processors are generally faster than RISC processors.

Which of the following is a key feature of RISC architecture?

• Complex instruction decoding

• Use of microprogramming

• Pipelining

• Large instruction set

In RISC architecture, what is the role of registers?

• To store complex instructions

• To hold intermediate data and instructions

• To manage input/output operations

• To decode instructions

What does SISD stand for in computer architecture?

• Single Instruction, Single Data

• Single Instruction, Simple Data

• Simple Instruction, Single Data

• Simple Instruction, Simple Data

Which architecture is characterized by executing multiple instructions on multiple data streams?

• SISD

• SIMD

• MISD

• MIMD

What is a characteristic of SIMD architecture?

• Executes a single instruction on a single data stream

• Executes multiple instructions on a single data stream

• Executes a single instruction on multiple data streams

• Executes multiple instructions on multiple data streams

Which of the following best describes MISD architecture?

• Multiple instructions operate on a single data stream

• Single instruction operates on multiple data streams

• Multiple instructions operate on multiple data streams

• Single instruction operates on a single data stream

What is a key characteristic of massively parallel computers?

• They use a single processor to execute tasks.

• They have a large number of processors working simultaneously.

• They rely on a single instruction set.

• They are limited to executing simple tasks.

How do RISC processors handle interrupts compared to CISC processors?

• RISC processors handle interrupts more slowly.

• RISC processors do not support interrupts.

• RISC processors handle interrupts more efficiently.

• RISC processors require more complex interrupt handling.

What is the purpose of pipelining in RISC processors?

• To increase the complexity of instruction sets

• To execute multiple instructions simultaneously

• To simplify the instruction decoding process

• To reduce the number of registers needed