
Assembly Language Quiz
Authored by indranee kashyap
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20 questions
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1.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
How many 32-bit and 16-bit processor registers are present in the IA-32 architecture?
8 of each
10 of each
10 32-bit and 6 16-bit registers
6 32-bit and 10 16-bit registers
2.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which of the following is NOT a category of registers in the IA-32 architecture?
General registers
Control registers
Segment registers
Stack registers
3.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
The 32-bit data registers EAX, EBX, ECX, and EDX can be accessed in which of the following ways?
Only as 32-bit registers
As 32-bit, 16-bit, and 8-bit registers
Only as 16-bit registers
Only as 8-bit registers
4.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
In NASM assembly language, how is a macro defined?
Using macro and endmacro directives
Using define and enddefine directives
Using %macro and %endmacro directives
Using startmacro and stopmacro directives
5.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
What is a key difference between macros and subroutines in assembly language?
Macros are executed at runtime, while subroutines are expanded at assembly time.
Macros can only be used once, whereas subroutines can be called multiple times.
Macros are expanded at assembly time, while subroutines are executed at runtime.
Subroutines cannot accept parameters, but macros can.
6.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
In assembly language, what is the primary purpose of the stack segment?
To store global variables.
To hold the return addresses of subroutines and handle interrupts.
To execute arithmetic operations.
To manage input/output operations.
7.
MULTIPLE CHOICE QUESTION
30 sec • 1 pt
Which of the following is the correct sequence of stages in the assembly process?
Syntax Analysis → Lexical Analysis → Opcode Mapping → Machine Code Generation
Lexical Analysis → Syntax Analysis → Symbol Table Creation → Opcode Mapping → Address Resolution → Relocation and Linking → Machine Code Generation
Opcode Mapping → Lexical Analysis → Symbol Table Creation → Syntax Analysis → Machine Code Generation
Symbol Table Creation → Address Resolution → Lexical Analysis → Opcode Mapping → Machine Code Generation
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