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1.1.4 Fetch Decode Execute Cycle

Total questions: 10

Worksheet time: 3mins

Name
Class
Date
1.

What was the name of the Scientist who created the Fetch, Decode, Execute Cycle

a)

Van Neumann

b)

Vin Neumann

c)

Von Neumann

d)

Von Newman

2.

True or False, instructions are fetched from the CPU

a)

True

b)

False

3.

The main memory is more commonly called the what?

a)

ROM

b)

RON

c)

RAN

d)

RAM

4.

RAM stands for?

a)

Random Access Memory

b)

Read Access Memory

c)

Read Any Memory

d)

Random Access Management

5.

Which 2 registers are responsible for processing the address of the next instruction to be executed?

a)

PC and the MDR

b)

MDR an the MAR

c)

CI and the MAR

d)

PC and the MAR

6.

The instructions that the PC indicates to be fetched are stored in which register?

a)

MAR

b)

MDR

c)

PC

d)

CI

7.

The contents of the MDR are copied to which register?

a)

MDR

b)

MAR

c)

CI

d)

PC

8.

Which part of the CPU is responsible for decoding the instructions?

a)

Control Unit

b)

Cache

c)

RAM

d)

ALU

9.

When instructions are read to the RAM are they being saved or opened?

a)

Saved

b)

Opened

10.

When instructions are being written are they being saved or opened?

a)

Saved

b)

Opened