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VLSI - Mock Test

Total questions: 20

Worksheet time: 18mins

Name
Class
Date
1.

In a MOS transistor, channel width has increased by 2 times. Corresponding change in the resistivity is,

a)

4 Times increase

b)

Doubled

c)

Reduced by half

d)

None of these

2.

The following program is executed in an 8085 processor,

MVI A,0A H;

MVI B,04 H;

LOOP: ADD B;

DCR B;

JNZ LOOP;

HLT;

At the end of the program, accumulator contains

a)

00 H

b)

04 H

c)

1A H

d)

14 H

3.

A D flip-flop is connected as shown in the figure. The input clock frequency is 100 MHz. What is the possible output frequency?

a)

100 MHz

b)

150 MHz

c)

200 MHz

d)

50 MHz

4.

For a TTL circuit, following data are given. VIH(min) = 2 V, VIL(max) = 0.8 V, VOH(min) = 2.5 V and VOL(max) = 0.4 V. The HIGH level and LOW level noise margins are, respectively

a)

0.5 V and 0.4 V

b)

0.4 V and 0.5 V

c)

2.4 V and 2 V

d)

None of these

5.

The output F of the shown 4 to 1 Multiplexer is

a)

XYX\overline{Y}

b)

X+Y\overline{X}+\overline{Y}

c)

X+YX+Y

d)

XYXY

6.

In a standard TTL, ‘totem pole’ stage refers to

a)

Phase Splitter

b)

Open Collector Output Stage

c)

Multi - Emitter Input Stage

d)

Output Buffer

7.

The NMOS circuit chain shown in the figure can act as a

a)

Buffer

b)

NAND Gate

c)

NOR Gate

d)

Invertor

8.

In a CARRY LOOK AHAEAD ADDER, carry generate (G)and carry propagate functions (P) can be realized by using

a)

OR and AND gates respectively

b)

AND and XOR gates respectively

c)

NAND and NOR gates respectively

d)

XOR and XNOR gates respectively

9.

Zener breakdown diodes have breakdown voltage which

a)

has positive temperature coefficient

b)

is independent of temperature

c)

has negative temperature coefficient

d)

None of these

10.

In a bipolar transistor biased in the forward active region, has base current IB= 50 μA and collector current IC= 2.7 mA. Then α is,

a)

0.949

b)

1

c)

0.982

d)

50

11.

In a common emitter amplifier, the un-bypassed emitter resistance provides

a)

Current Series Feedback

b)

Voltage Series Feedback

c)

Voltage Shunt Feedback

d)

Current Shunt Feedback

12.

Two breakdown diodes A and B have breakdown voltage ratings of 5.6 V and 24 V, respectively. Then

a)

A is a Zener diode and B is an avalanche diode

b)

B is a Zener diode and A is an avalanche diode

c)

Both are Zener diodes

d)

Both are avalanche diodes

13.

Commonly used material in photoconductive cells which is to work in visible spectrum is,

a)

Ge

b)

Si

c)

CdS

d)

GaAs

14.

What is the total number of transistors required in a static N- input pseudo NMOS logic gate?

a)

N

b)

2N

c)

N+1

d)

N-1

15.

For the op-amp circuit shown, the feedback resitance is 2 K ohm and all other resistances are of 1 K ohm. The output voltage is

a)

-2 V

b)

-1 V

c)

-0.5 V

d)

0.5 V

16.

The fastest logic family is

a)

CMOS

b)

NMOS

c)

TTL

d)

ECL

17.

Supply voltage of a CMOS circuit is doubled. Its dynamic power dissipation will

a)

not change

b)

be doubled

c)

be halved

d)

increase by 4 times

18.

While transforming the given circuit to an equivalent voltage source and a series resistor, the values of source voltage and resistance will be,

a)

10 V, 100 Ω10\ V,\ 100\ \Omega

b)

75.5 V, 75 Ω75.5\ V,\ 75\ \Omega

c)

12.55 V, 100 kΩ12.55\ V,\ 100\ k\Omega

d)

88.42 V, 7.92 kΩ88.42\ V,\ 7.92\ k\Omega

19.

Which of the following one is not a bilateral element?

a)

Resistor

b)

LED

c)

Capacitor

d)

LDR

20.

The technology node we used while designing an inverter layout during training is

a)

90 nm

b)

22 nm

c)

180 nm

d)

45 nm