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Computer Architecture Unit 3

Total questions: 15

Worksheet time: 15mins

Name
Class
Date
1.

Example of user visible register

a)

MDR

b)

General Purpose Reg

c)

IR

d)

PC

2.

Segment Register is a _____register

a)

General Purpose

b)

Address Reg

c)

Data Reg

3.

Example of control and staus register

a)

General Purpose Reg

b)

Data Reg

c)

Address Reg

d)

PC

4.

Program Counter (PC) stores

a)

Address

b)

Data

c)

Instruction

5.

Instruction Reg (IR) stores

a)

Address

b)

Instruction

c)

Data

6.

Register and ALU communicates through

a)

Address Bus

b)

Data Bus

c)

Internal CPU bus

7.

The data read from memory is stored in to

a)

MAR

b)

IR

c)

MDR

8.

Address of memory location where we need to read or write is stored in

a)

MAR

b)

MDR

c)

PC

9.

After fetch cycle the CPU will execute which cycle?

a)

Interrupt Cycle

b)

Execute Cycle

c)

Execute or Indirect Cycle

10.

After indirect cycle the cpu will perform

a)

Fetch cycle

b)

Interupt Cycle

c)

Execute Cycle

11.

The direction of data flow in fetch cycle is

a)

towards CPU

b)

Towards Memory

c)

Both Direction

12.

The direction of data flow in data bus at interrupt cycle

a)

towards cpu

b)

towards memry

c)

both direction

13.

In interrupt cycle MAR get address from

a)

PC

b)

IR

c)

Control Unit

14.

In fetch cycle MAR gets address from

a)

PC

b)

Control Umit

c)

MDR

15.

In indirect cycle MAR gets address from

a)

PC

b)

Control Unit

c)

MDR