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WorksheetsEC8552_CA0_MODEL EXAM I_PART B_16.10.2020
Total questions: 10
Worksheet time: 10mins
1. Consider the following instructions:
add $s0, $t0, $t1
sub $t2, $s0, $t3. Find the type of hazard occurred in the above program.
Data Hazard
Structural Hazard
Control Hazard
All the above
2.____________ is an approach whereby the compiler or processor guesses the outcome of an instruction to remove it as a dependence in executing other instructions.
Speculation
Branch
Buffer
Exception
3.____________ is a scheme in which writes always update both the cache and the memory,ensuring that data is always consistent between the two.
Write Back
Write Through
Write Buffer
All the above
4.We have two machines with different implementations of the same ISA. Machine A has a clock cycle time of 10 ns and a CPI of 2.0 for program P; machine B has a clock cycle time of 20 ns and a CPI of 1.2 for the same program. Which machine is faster? Let IC be the number of instructions to be executed. Then Cycles count_A = 2.0 IC
machine A ,10%
machine A ,20%
machine B ,10%
machine B ,20%
5._______________is a special instruction that transfers control from user mode to a dedicated location in supervisor code space, invoking the exception mechanism in the process.
System Call
System Hit
TLB Hit
TLB Miss
6.____________________ is a multi-master serial bus that connects low speed peripherals to a motherboard, mobile phone, embedded system or other electronic devices.
SPI
I2C
PPI
MBFBMC
7.In what type of memory access , all the distributed main memories are converted to cache memories.
Cache Only Memory Access
Uniform Memory Access
Non Uniform Memory Access
All the above
9.The _______________ is interconnection network for large-scale distributed memory multiprocessors.
Hierarchical Cube Network
Dual Cube
Meta Cube
Folded Dual Cube
