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Worksheets

Digital Electronics and Computer Organization

Total questions: 30

Worksheet time: 30mins

Name
Class
Date
1.

A subtractor subtracts the subtrahend from the minuend

a)

True

b)

False

2.

Which logic gate functionality does this circuit represent

a)

AND Gate

b)

OR Gate

c)

NAND Gate

d)

ENXOR Gate

3.

Which logic gate functionality does the circuit represent

a)

AND Gate

b)

OR Gate

c)

EXOR Gate

d)

NOR Gate

4.

Which of the following is NOT a universal gate

a)

NAND Gate

b)

EXOR Gate

c)

OR Gate

5.

A full adder can subtract three bits of data

a)

TRUE

b)

FALSE

6.

7432 is a:

a)

Quad two input OR Gate IC

b)

Quad two input AND Gate IC

c)

Dual four input OR Gate IC

d)

Triple three input OR Gate IC

7.

Which among the following fall under the category of BASIC Gates

a)

AND Gate

b)

OR Gate

c)

NAND Gate

d)

EXNOR Gate

8.

A priority encoder is a sequential circuit

a)

False

b)

True

9.

How many select lines will a 16:1 MUX require?

a)

2

b)

3

c)

4

d)

None of the above

10.

Can a decoder be used as a De-multiplexer?

a)

Yes

b)

No

11.

In Active Low Logic, logic 0 is considered as logic 1

a)

True

b)

False

12.

Which among the following is the HEXINVERTER IC

a)

7404

b)

7408

c)

7402

d)

7400

13.

Which of the following is the expression for 'Bout' in a Full Subtractor when X-Y is performed

a)
b)
14.

A full subtractor is obtained by cascading two half subtractors

a)

True

b)

False

15.

A MUX with 2 select lines can handle ____ (number) of output line(s)

a)

2

b)

4

c)

8

d)

1

16.

In Full Adder, Cin represents the carry from the

a)

Present state

b)

Previous state

17.

The expression for the Sum output of a Full Adder is similar to the expression of:

a)

Sum of Half Adder

b)

Difference of Half Subtractor

c)

Difference of Full Subtractor

18.

A 1:8 DMUX uses _____ (number) of select lines.

a)

2

b)

3

c)

4

d)

8

19.

A half adder does not satisfy all the requirements of an adder

a)

TRUE

b)

FALSE

20.

The functionality of a NAND Gate can be obtained by cascading ICs 7408 and 7404

a)

True

b)

False

c)

Cannot be determined

21.

A MUX with 3 select lines can route:

a)

8 input lines to one output line

b)

4 input lines to one output line

c)

Two sets of 4 input lines to two sets of single output lines

d)

one input line to 8 output lines

22.

A MUX and DMUX can be used to establish a communication link between multiple input and output lines

a)

True

b)

False

23.

Which among the following holds TRUE for encoders

a)

Reversible transformation of data in different formats

b)

Secure encoding of data

c)

Validates the integrity of data

d)

Protects the confidentiality of data

24.

____ is/ are the technique(s) to transform data from one format to another so that it can be understood and consumed by different systems

a)

Encoding

b)

Multiplexing

c)

Demultiplexing

d)

Encoding and Decoding

25.

During the process of encoding and decoding, the information in the message is retained

a)

True

b)

False

c)

Depends on the algorithm

d)

Depends on the communicating systems involved

26.

Encoding is used to enforce security on the data transmitted

a)

True

b)

False

27.

Multiplexers are monodirectional electronic devices.

a)

True

b)

False

28.

Identify the digital electronic circuit

a)

Multiplexerr

b)

Demultiplexer

c)

Encoder

d)

Decoder

29.

The demerit of a half adder is rectified in a full adder

a)

True

b)

False

30.

IC74139 is a

a)

3 line to 8 line decoder IC

b)

3 line to 8 line DMUX IC

c)

8:! MUX

d)

3 3 line to 8 line decoder/DMUX IC