Font size
WorksheetsChapters 1-3
Total questions: 27
Worksheet time: 14mins
*** - Contains components which enable it to execute instructions. Components include the control unit, buses, ALU and registers.
(a)
*** *** - Controls and coordinates activities of the CPU. Directs the flow of data.
(a)
*** - A set of parallel wires connecting two or more components.
(a)
The *** bus carries command and control signals to and from every other component of a computer.
(a)
The *** bus is the lines on the system bus that the CPU uses to send and receive data.
(a)
The *** bus is used to transfer information about where data should reside in memory.
(a)
The *** performs arithmetic and logical operations on the data.
(a)
The ALU can carry out *** logical operations such as AND, OR, NOT, XOR.
(a)
A *** is a special memory cell that has a specific purpose.
(a)
The *** *** is a register which holds the address of the next instruction to be executed.
(a)
The *** holds the current instruction being executed.
(a)
The *** holds the memory location of data that needs to be accessed.
(a)
The *** temporarily stores the data retrieved from memory.
(a)
An *** is an operation code or instructions used in assembly language. Determines the type of instruction and what hardware should be used.
(a)
An *** is an operation code or instructions used in assembly language. It contains the address of the data to be used or the actual data itself.
(a)
The *** *** controls the timing of all computer operations. Switches between 0 and 1 several million times per second.
(a)
Each *** is able to process a different instruction at the same time with its own fetch-execute cycle.
(a)
*** is small and expensive but very fast memory inside or near the CPU. Instructions copied from main memory are stored here.
(a)
*** is a technique that allows the CPU to work on more than one instruction at a time.
(a)
A *** is a specialised circuit that controls the manipulation and display of graphics on a display device.
(a)
A *** processor allows simple instructions, each taking one clock cycle to execute.
(a)
A *** processor is a general-purpose microprocessor chip designed to handle a wider array of instructions than a RISC chip.
(a)
In which stage of the FDE cycle is the address of the next instruction copied from the PC to the MAR?
Fetch
Decode
Execute
In which stage of the FDE cycle are the contents of the MDR copied to the CIR?
Fetch
Decode
Execute
In which stage of the FDE cycle is the data to be operated on copied to the MDR?
Fetch
Decode
Execute
In which stage of the FDE cycle is the address of the data to be operated on copied to the MAR?
Fetch
Decode
Execute
In which stage of the FDE cycle is the opcode carried out on the operand?
Fetch
Decode
Execute
