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Combinational Logic circuits

Total questions: 15

Worksheet time: 15mins

Name
Class
Date
1.

Which of the following logic expressions represents the logic diagram shown?

a)

X=AB’+A’B

b)

X=(AB)’+AB

c)

X=(AB)’+A’B’

d)

X=A’B’+AB

2.

The device shown here is most likely a ________

a)

Comparator

b)

Multiplexer

c)

Demultiplexer

d)

Inverter

3.

3 bits full adder contains ________

a)

3 combinational inputs

b)

4 combinational inputs

c)

6 combinational inputs

d)

8 combinational inputs

4.

What is a multiplexer?

a)

It is a type of decoder which decodes several inputs and gives one output

b)

A multiplexer is a device which converts many signals into one

c)

It takes one input and results into many output

d)

It is a type of encoder which decodes several inputs and gives one output

5.

In a multiplexer, the selection of a particular input line is controlled by ___________

a)

Data controller

b)

Selection Lines

c)

Logic Gates

d)

None of above

6.

If the number of n selected input lines is equal to 2^m then it requires _____ select lines.

a)

2

b)

m

c)

n

d)

2n

7.

How many select lines would be required for an 8-line-to-1-line multiplexer?

a)

2

b)

4

c)

8

d)

3

8.

How many NOT gates are required for the construction of a 4-to-1 multiplexer?

a)

3

b)

2

c)

5

d)

4

9.

A combinational circuit is one in which the output depends on the ____________

a)

Input combination at the time

b)

Input combination and the previous output

c)

Input combination at that time and the previous input combination

d)

None of above

10.

Most demultiplexers facilitate which type of conversion?

a)

Decimal to hexadecimal

b)

Single input multiple output

c)

AC to DC

d)

Odd parity to even parity

11.

In 1-to-4 demultiplexer, how many select lines are required?

a)

2

b)

3

c)

4

d)

5

12.

Which IC is used for the implementation of 3-8 DEMUX?

a)

IC74154

b)

IC74155

c)

IC74139

d)

IC74138

13.

The full subtractor can be implemented using ___________

a)

Two XOR and an OR gates

b)

Two half subtractors and an OR gate

c)

Two multiplexers and an AND gate

d)

Two comparators and an AND gate

14.

The output of following BCD addition is:

     (1000)BCD+(0100)BCD=

a)

00010010

b)

000011110

c)

000001111

d)

111101000

15.

Which of the following circuits in figure (a to d) is the sum-of-products implementation of figure (e)?

a)

a

b)

b

c)

c

d)

d