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20EC204 Digital System Design Surprise Quiz

Total questions: 10

Worksheet time: 5mins

Name
Class
Date
1.

What gate outputs 1 if and only if at least one input is 1?

a)

OR

b)

NOT

c)

EX-NOR

d)

NOT

2.
a)

AB’+A’B

b)

AB+A’B’

c)

AB+A’B

d)

A’B’+AB

3.

Most demultiplexers facilitate which type of conversion?

a)

Decimal-to-Hexadecimal

b)

Single input, multiple outputs

c)

odd to even parity

d)

Binary to Octal conversion

4.

What type of register would shift a complete binary number in one bit at a time and shift all the stored bits out one bit at a time?

a)

SISO

b)

PISO

c)

SIPO

d)

PIPO

5.

Which of the following is a major advantage of the D-type flip-flop over the clocked SR type?

a)

A shorter propagation delay

b)

Only one input and one output

c)

No indeterminate

State

d)

Negative Edge Triggering

6.

Which of the following is not the characteristics of RAM?

a)

RAM is read/write memory

b)

RAM holds data and instruction on which we are currently working

c)

RAM is Non-Volatile i.e, Permanent

d)

The amount of RAM in computer affects the number of programs a computer can run at the same time.

7.

This is the dominant among the other logic family, use for systems that are low power consumption

a)

TTL

b)

CMOS

c)

ECL

d)

DTL

8.

Whether verilog language is case sensitive ?

a)

True

b)

False

9.

Integer datatype in Verilog is allocated ______ number of bits

a)

16

b)

32

c)

8

d)

64

10.

Property A+0 = ?

a)

0

b)

1

c)

A

d)

A'