NEW
Font size
WorksheetsIC Design session
Total questions: 15
Worksheet time: 8mins
Which of the following is the fastest, smallest, and cheapest per unit to implement a given complex circuit in large volume?
FPGA
ASIC
PLA
CPLD
How many bits are in a single Binary Coded Decimal digit?
10 bits
2 bits
4 bits
8 bits
What is the basic unit of storage in a digital circuit?
Ouroborous NOT storage unit
Flip Flop
Transistor-capactior storage unit
Magnetic storage
Combinational logic is implemented on FPGAs using __.
Robotic Arm
Look Up Tables (LUTs)
Microcontrollers (uCs)
Multiplexers (MUXs)
The variant of 7 segment display used in the session ____.
Red
Green
Common anode
Common cathode
The EDA software used in this session ___.
Xilinx ISE
Altera Quartus
Xilinx Vitis Suite
Xilinx Vivado suite
Circuits which depend on both current inputs and previous inputs/state to determine the output are called ____
Combinational circuits
Impulse invariant circuits
Sequential circuits
Relay circuits
Clock signals are mandatory in ____
Asynchronous circuits
Synchronous circuits
Coherent circuits
Quadrature circuits
The clock edge used to shift the serial input bits into the register ____.
Falling(Negative) Edge
Rising(Positive) Edge
High State
Low State
Verilog is a ____
Software Description Language
Hardware Description Language
Transaction Level Langauge
Assembly Language
What is an Instruction Set Architecture?
Set of instructions executable by a CPU following it
Set of rules for the chipset to interface with the CPU
Specifications for the instruction memory architecture
Instructions for building a PC
Does Verilog run on the integrated circuit designed?
Yes, it runs on a boot loader chip
Yes, it runs on the IC designed
No, it is a framework for writing C++ code to make a processor on an FPGA
No, it is a set of instructions for a fab process or for an FPGA
A simple Arithmetic and Logic Units are an example of a/an ____
Combinational Digital circuit
Sequential Digital circuit
Analog circuit
Mixed signal circuit
The code written in a Verilog test bench is ___
Synthesizable
Non-synthesizable
Implementable
None of the above
What is RTL Design?
Resistor Transistor Logic design
Real-Time Logic design
Reduced Transistor Latency design
Register Transfer Level design
