Font size
S
M
L
XL
WorksheetsSEM 2 ADC
Total questions: 140
Worksheet time: 47mins
Name
Class
Date
1.
A transistor has___________
a)
one pn junction
b)
Two pn junctions
c)
three pn junctions
d)
four pn junctions
2.
The number of depletion layers in a transistor is …………
a)
four
b)
three
c)
one
d)
two
3.
The base of a transistor is ………….. doped
a)
heavily
b)
moderately
c)
lightly
d)
none of the above
4.
The element that has the biggest size in a transistor is ………………..
a)
collector
b)
base
c)
emitter
d)
collector-base-junction
5.
The transistor was invented in
a)
1948
b)
1947
c)
1974
d)
1847
6.
In a NPN transistor, the N-regions are_____________
a)
Base and Emitter
b)
Base and collector
c)
Emitter and collector
d)
Both A and B
7.
The emitter current is always_____________________
a)
Greater than the base <br />current
b)
Less than the collector current
c)
Greater than the collector current
d)
Both A and C
8.
In NPN Transitor current conduction is mainly due to the flow of
a)
Electrons
b)
Holes
c)
protons
d)
None of the above
9.
In PNP Transitor current conduction is mainly due to the flow of
a)
Electrons
b)
Holes
c)
neutrons
d)
None of the above
10.
The most of the majority carriers from the emitter ……………
a)
Recombine in the base
b)
Recombine in the emitte
c)
Pass through the base region to the collector
d)
None of the above
11.
In --------- transistor, the arrowhead in the emitter region point outwards.
a)
PNP
b)
NPN
c)
PPN
d)
NNP
12.
The bias condition for a transistor to be used as a linear <br />amplifier is_____________________
a)
Forward-Reverse
b)
Forward-Forward
c)
Reverse-Reverse
d)
Collector-bias
13.
The eqation of alpha =
a)
dc= IC/IE
b)
dc=IE/IC
c)
DC=IB/IE
d)
DC = IB-IC
14.
In a transistor ………………..
a)
IC = IE + IB
b)
IB = IC + IE
c)
IE = IC – IB
d)
IE = IC + IB
15.
In CC configuration ………... terminal is Common to both input and output
a)
emiter
b)
Base and collector
c)
Base
d)
collector
16.
The relation between β and α is …………..
a)
β = 1 / (1 – α )
b)
β = (1 – α ) / α
c)
β = α / (1 – α )
d)
β = α / (1 + α )
17.
The value of β for a transistor is generally ………………..
a)
1
b)
less than 1
c)
between 20 and 500
d)
above 500
18.
The most commonly used transistor arrangement is …………… arrangement
a)
common emitter
b)
common base
c)
common collector
d)
none of the above
19.
. The phase difference between the input and output voltages in a common emitter arrangement is …………….
a)
180
b)
90
c)
270
d)
0
20.
In which region a transistor acts as an open switch?
a)
cut off region
b)
inverted region
c)
active region
d)
saturated region
21.
In which region a transistor acts as a closed switch?
a)
cut off region
b)
inverted region
c)
active region
d)
saturated region
22.
The current which is helpful for LED to turn on is_________
a)
emitter current
b)
depends on bias
c)
base current
d)
collector current
23.
Which of the following statements is true?
a)
Solid state switches are applications for an AC output
b)
LED’s can be driven by transistor logics
c)
Only NPN transistor can be used as a switch
d)
Transistor operates as a switch only in active region
24.
The technique used to quickly switch off a transistor is by_________
a)
reverse biasing its emitter to collector junction
b)
reverse biasing its base to collector junction
c)
reverse biasing its base to emitter junction
d)
reverse biasing any junction
25.
The switching power with a PNP transistor is called _________
a)
sourcing current
b)
sinking current
c)
forward sourcing
d)
reverse sinking
26.
A pnp transistor has
a)
only acceptor
b)
only donor ions
c)
two p- region and one-N -region
d)
three P-N junction
27.
The time taken for a transistor to turn from saturation to cut off is _________
a)
inversely proportional to charge carriers
b)
directly proportional to charge carriers
c)
charging time of the capacitor
d)
discharging time of the capacitor
28.
The base emitter voltage in a cut off region is _________
a)
greater than 0.7V
b)
equal to 0.7V
c)
ess than 0.7V
d)
cannot be predicted
29.
A relay is used to
a)
Break the fault current
b)
sense the fault
c)
sense the fault and direct to trip the circuit breaker
d)
all of these
30.
Which of the following rule is used to determine the direction of rotation of D.C motor?
a)
Fleming’s Left-hand Rule
b)
Columb’s Law
c)
Lenz’s Law
d)
Fleming’s Right-hand Rule
31.
MOSFETs as compare to BJT has
a)
high speed
b)
low speed
c)
zero speed
d)
low gain
32.
4. Choose the correct statement(s)<br />i) The gate circuit impedance of MOSFET is higher than that of a BJT<br />ii) The gate circuit impedance of MOSFET is lower than that of a BJT<br />iii) The MOSFET has higher switching losses than that of a BJT<br />iv) The MOSFET has lower switching losses than that of a BJT<br />
a)
Both i & ii
b)
Both ii & iv
c)
Both i & iv
d)
Only i
33.
MOSFETs as compare to BJTs consumes
a)
more power
b)
less power
c)
zero power
d)
infinite power
34.
The MOSFET stands for
a)
Metal oxidized selenium FET
b)
Metal oxide surface FET
c)
Metal oxide semiconductor FET
d)
Metal of surface FET
35.
The MOSFET combines the areas of _______ & _________
a)
field effect & MOS technology A
b)
semiconductor & TTL
c)
mos technology & CMOS technology
d)
none of the mentioned
36.
Which of the following terminals does not belong to the MOSFET?
a)
Drain
b)
Gate
c)
base
d)
Source
37.
Choose the correct statement
a)
MOSFET is a uncontrolled device
b)
MOSFET is a voltage controlled device
c)
MOSFET is a current controlled device
d)
MOSFET is a temperature controlled device
38.
Choose the correct statement
a)
MOSFET is a unipolar, voltage controlled, two terminal device
b)
MOSFET is a bipolar, current controlled, three terminal device
c)
MOSFET is a unipolar, voltage controlled, three terminal device
d)
MOSFET is a bipolar, current controlled, two terminal device
39.
The arrow on the symbol of MOSFET indicates
a)
that it is a N-channel MOSFET
b)
the direction of electrons
c)
the direction of conventional current flow
d)
that it is a P-channel MOSFET
40.
The depletion N-channel MOSFET
a)
Can be operated as a JFET with zero gate voltage
b)
Can be operated as an enhancement MOSFET by applying +ve bias to gate
c)
Can be operated as an enhancement MOSFET by applying -ve bias to gate
d)
Cannot be operated as an enhancement MOSFET
41.
The enhancement N-channel MOSFET
a)
Cannot be operated as an enhancement MOSFET
b)
Can be operated as a JFET with zero gate voltage
c)
Can be operated as an enhancement MOSFET by applying -ve bias to gate
d)
Can be operated as an enhancement MOSFET by applying +ve bias to gate
42.
The enhancement MOSFET is
a)
widely used in IC design
b)
Useful as a very good constant voltage source
c)
Widely used because of easy in its fabrication
d)
Normally on MOSFET
43.
In MOSFETs N-channel is more preferred than P-channel because
a)
It is cheaper
b)
It is faster
c)
It has better drive capability
d)
It has better noise immunity
44.
THE E-MOSFET Transistor are the abbrevation of
a)
entered -MOSFET
b)
enhanced -MOSFET
c)
enchancement -MOSFET
d)
both a and b
45.
The N-channel MOSFET is considered better than the P-channel MOSFET due to its
a)
low noise levels
b)
TTL compatibility
c)
lower input impedance
d)
faster operation
46.
An open-collector output requires---------------------
a)
an output reistor
b)
a pull-up resistor
c)
no output resistor
d)
a pull-down resistor
47.
An open collector ouput can---------current ,but it cannot-----------------.
a)
sink,source current
b)
source,sink current
c)
sink,source voltage
d)
source,sink voltage
48.
which of the following is the other name for Common Drain Amplifier?
a)
Source Follower
b)
Current Booster
c)
Voltage booster
d)
voltage limiter
49.
which of the following is true about common Drain amplifier?
a)
it has low input impedance
b)
it has high output impedance
c)
infinite gain
d)
output will be same as input
50.
pull down resistor always connected to
a)
source
b)
ground
c)
input
d)
output
51.
Totem-pole outpit,also known as a
a)
push-pull output
b)
totem -dipole output
c)
pull-pull output
d)
push-push output
52.
pull up resistor is an example of
a)
TTL
b)
DTL
c)
RTL
d)
BTL
53.
Resistor which holds the logic signal near zero volts when no other active device is connected is called
a)
zener resistor
b)
variable resistor
c)
pull-up resistor
d)
PULL-down resistor
54.
Active pull up has element called
a)
transistor
b)
resistor
c)
insulator
d)
conductor
55.
Which of the following are not characteristics of TTL logic gates?
a)
Totem -pole output
b)
Bipolar transistor
c)
CMOS transistor
d)
Multimeter transistor
56.
A TTL totem -pole circcuits is designed so that the output transistor
a)
Provide phase splitting
b)
Are always on together
c)
Are never on together
d)
Provide voltage regulation
57.
Schottky diode operate only with
a)
minorty carriers
b)
majority carriers
c)
capacitors
d)
inductor
58.
schottky diode has junction made up of
a)
metal to n region
b)
p to n region
c)
metal to semiconductor
d)
metal to insulator
59.
Schottky diodes are also known as
a)
minority carrier diode
b)
hot carrier diode
c)
majority carrier diode
d)
electrode carrier diode
60.
Diode used primarily in high frequency devices and fast switching application is called
a)
current regulator diode
b)
schotky diode
c)
PIN diode
d)
zener diode
61.
Diode formed by joining a doped semiconductor region with a metal such as gold,silver or platinum is
a)
current regulator diode
b)
schotky diode
c)
PIN diode
d)
zener diode
62.
What is a multiplexer?
a)
It is a type of decoder which decodes several inputs and gives one output
b)
A multiplexer is a device which converts many signals into one
c)
It takes one input and results into many output
d)
It is a type of encoder which decodes several inputs and gives one output
63.
Multiplexers are also called__________
a)
Decoders
b)
encoders
c)
data selectors
d)
comparators
64.
If the number of n selected input lines is equal to 2^m then it requires _____ select lines.
a)
2
b)
m
c)
n
d)
2n
65.
4 to 1 MUX would have
a)
2 inputs
b)
3 inputd
c)
4 inputs
d)
5 inputs
66.
The enable input is also known as ___________
a)
Select input
b)
Decoded input
c)
Strobe
d)
Sink
67.
How many NOT gates are required for the construction of a 4-to-1 multiplexer?
a)
3
b)
4
c)
2
d)
5
68.
In a multiplexer the output depends on its
a)
data inputs
b)
select inputs
c)
select outputs
d)
enable pins
69.
The two inputs MUX would have
a)
1 select line
b)
2 select line
c)
4 select line
d)
3 select line
70.
If enable input is high then the multiplexer is
a)
enable
b)
disable
c)
saturation
d)
High impedance
71.
Demultiplexers are also called
a)
Decoders
b)
encoders
c)
data distributors
d)
comparators
72.
In 1-to-4 demultiplexer ,how many select lines are required?
a)
2
b)
3
c)
4
d)
5
73.
The word demultiplexer means
a)
one into many
b)
many to one
c)
distributor
d)
one into many as well as distributor
74.
Which of the following circuits can be used as parallel to serial converter
a)
Multiplexer
b)
Demultiplexer
c)
Decoder
d)
digital counter
75.
Most demultiplexer facilitates which types of conversion?
a)
Decimal to hexadecimal
b)
Single input,multiple outputs
c)
AC to DC
d)
Odd parity to even parity
76.
Why is a demultiplexer called a data distributor?
a)
The input will be distributed to one of the outputs
b)
One of the inputs will be selected for the output
c)
The output will be distributed to one of the inputs
d)
Single input to Single Output
77.
Asynchronous counter is also known as __________ counter
a)
SYNCHRONOUS
b)
RIPPLE
c)
DELAY
d)
NONE OF THE ABOVE
78.
The counters in which the change in transition doesn’t depend upon the clock signal input is known as “____________
a)
UP COUNTER
b)
SYNCHRONOUS COUNTER
c)
Asynchronous counters”
d)
BISTABLE COUNTER
79.
Asynchronous sequential logic circuits ususlly performs operation in
a)
identical mode
b)
fundamental mode
c)
reserved mode
d)
reset mode
80.
In fundamental mode, the circuits is assumed to be in
a)
unstable state
b)
stable state
c)
reset state
d)
clear state
81.
In the asynchronous circuit,the changes occur with the changes of
a)
input
b)
output
c)
clock pulse
d)
Time
82.
The complexity of the asynchronous circuit is invovled in the timing problem of
a)
input
b)
outputs
c)
clock pulses
d)
feedback path
83.
The sequential circuits is also called
a)
combination circuits
b)
sequential circuits
c)
logic circuits
d)
complex circuits
84.
How many types of sequential circuits have?
a)
2
b)
5
c)
6
d)
7
85.
Sequential circuits are
a)
synhronous
b)
asynchronous
c)
signals
d)
both A and B
86.
Bidirectional counters, also known as ___________
a)
Up/Down counters
b)
UP COUNTER
c)
DOWN COUNTER
d)
NONE OF THE ABOVE
87.
UP-DOWN counter is a combination of ____________
a)
latches
b)
Flip flop
c)
Up counter
d)
Up counter& down counter
88.
UP-DOWN counter is also known as ___________
a)
Dual counter
b)
Multi counter
c)
Multimode counter
d)
Two Counter
89.
Once an up-/down-counter begins its count sequence, it
a)
Starts counting
b)
Can be reversed
c)
Can’t be reversed
d)
Can be altered
90.
In 4-bit up-down counter, how many flip-flops are required?
a)
2
b)
3
c)
4
d)
5
91.
In an UP-counter, each flip-flop is triggered by ___________
a)
The output of the next flip-flop
b)
The normal output of the preceding flip-flop
c)
The clock pulse of the previous flip-flop
d)
The inverted output of the preceding flip-flop
92.
In DOWN-counter, each flip-flop is triggered by ___________
a)
The output of the next flip-flop
b)
The normal output of the preceding flip-flop
c)
The clock pulse of the previous flip-flop
d)
The inverted output of the preceding flip-flop
93.
SIPO stands for _____________
a)
SERIAL OUT to PARALLEL IN
b)
SERIAL IN to PARALLEL IN
c)
SERIAL IN to PARALLEL OUT
d)
SERIAL OUT to PARALLEL OUT
94.
SISO stands for ____________
a)
SERIAL OUT to PARALLEL IN
b)
SERIAL IN to SERIAL OUT
c)
SERIAL IN to PARALLEL OUT
d)
SERIAL OUT to PARALLEL OUT
95.
PIPO stands for _____________
a)
SERIAL OUT to PARALLEL IN
b)
SERIAL IN to SERIAL OUT
c)
PARALLEL IN to PARALLEL OUT
d)
SERIAL OUT to PARALLEL OUT
96.
PISO stands for _____________
a)
SERIAL OUT to PARALLEL IN
b)
SERIAL IN to SERIAL OUT
c)
PARALLEL IN to PARALLEL OUT
d)
PARALLEL IN to SERIAL OUT
97.
Based on how binary information is entered or shifted out, shift registers are classified into _______ categories
a)
2
b)
3
c)
4
d)
5
98.
A shift register that will accept a parallel input or a bidirectional serial load and internal shift features is called as?
a)
Tristate
b)
End around
c)
Universal
d)
Conversion
99.
How can parallel data be taken out of a shift register simultaneously?
a)
Use the Q output of the first FF
b)
Use the Q output of the last FF
c)
Tie all of the Q outputs together
d)
Shift Registers - Digital Circuits Questions and Answers - Sanfoundry
100.
What is meant by the parallel load of a shift register?
a)
All FFs are preset with data
b)
Each FF is loaded with data, one at a time
c)
Parallel shifting of data
d)
All FFs are set with data
101.
A parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________
a)
1110
b)
1
c)
1100
d)
1000
102.
Memory permits data to be stored and retrived at comparable speed is called
a)
R/W memory
b)
RAM memory
c)
ROM memory
d)
EPRAM memory
103.
Memory which is usually of random acess type is termed as
a)
main memory
b)
mass storage memory
c)
second memory
d)
flip flop
104.
SRAM stands for _________________
a)
STATIC RADIAL ACCESS MEMORY
b)
STATIC RANDOM ACCESS MEMORY
c)
STATE RANDOM ACCESS MEMORY
d)
NONE OF THE ABOVE
105.
ROM stands for
a)
READ ONLY MEMORY
b)
READY ONLY MEMORY
c)
RATE ON MEMORY
d)
RATE OFF MEMORY
106.
RAM stands for
a)
RADIAM ACCEPT MEMORY
b)
RADIOM ACCESS MEMORY
c)
A&B
d)
RANDOM ACCESS MEMORY
107.
Memory in which are data are available only in the same sequence in which the data were originally stored is
a)
sequential memory
b)
combinal memory
c)
stste memory
d)
flip flop
108.
Which of the following can easily convert to a non-volatile memory?
a)
SRAM
b)
DRAM
c)
DDR SRAM
d)
Asynchronous DRAM
109.
Which memory storage is widely used in PCs and Embedded Systems?
a)
SRAM
b)
DRAM
c)
Flash memory
d)
EEPROM
110.
Which of the following memory technology is highly denser?
a)
DRAM
b)
SRAM
c)
EPROM
d)
Flash memory
111.
Which is the storage element in DRAM
a)
Inductor
b)
capacitor
c)
resistor
d)
mosfet
112.
Which one of the following is a storage element in SRAM?
a)
Inductor
b)
capacitor
c)
transistor
d)
resistor
113.
Which of the following is more volatile?
a)
SRAM
b)
DRAM
c)
ROM
d)
RAM
114.
Flash memory devices are typically much faster at
a)
reading
b)
writing
c)
taking input signal
d)
generating output signal
115.
In NOR type flash memory, data is erased
a)
bitwise
b)
bytewise
c)
blockwise
d)
sentence wise
116.
In NOR type flash memory, each cell has one end connected to
a)
Source
b)
drain
c)
gate
d)
ground
117.
Flash memory is a non-volatile storage device in which data
a)
can be erased physically
b)
can be erased magnectically
c)
can be erased electrically
d)
cannot be erased
118.
Two types of digital circuit technology that use bipolar junction transistors are __________.
a)
TTL and ECL
b)
CMOS & NMOS
c)
NMOS & PMOS
d)
NONE OF THE ABOVE
119.
TTL stands for _______________
a)
TOGGLE TRANSISTOR LOGIC
b)
TOGGLE TOGGLE LOGIC
c)
TRANSISTOR TRANSISTOR LOGIC
d)
TRANSISTOR TOGGLE LOGIC
120.
CMOS stands for __________________
a)
COMPLIMENTARY METAL OXIDE SEMICONDUCTOR
b)
COMPLEX METAL OXIDE SEMICONDUCTOR
c)
COMPLIMENTARY MEASUREMENT OXIDE STATE
d)
NONE OF THE ABOVE
121.
what is meant by the fan-out of a logic gate-----------------
a)
the number of other gates that can be connected to the gates's output
b)
The physical distance between the voutput pins on the devices
c)
the number og other gates that can be connected to one of the gate's inputs
d)
the amount of cooling required by the gate
122.
The noise immunity ____________ with increase in noise margin
a)
decreases
b)
increases
c)
constant
d)
none of the mentioned
123.
what does Tphl indicates?
a)
delay time in going form high to low logic
b)
delay time in going form low to high logic
c)
delay time in going form high to high logic
d)
delay time in going form low to low logic
124.
An ADC inputs an analog electrical signal such as voltage or current and outputs ___________
a)
HEXADECIMAL NUMBER
b)
OCTAL NUMBER
c)
BINARY NUMBER
d)
DECIMAL NUMBER
125.
ADC stands for _________________
a)
ANALOG to DIGITAL CONVERTER
b)
AMPLITUDE DIGITAL CONVERTER
c)
ANGLE DATA CONVERTER
d)
NONE OF THE ABOVE
126.
ADC conversio involves
a)
quantization
b)
simulation
c)
summation
d)
substraction
127.
__________ is also called the parallel A/D converter
a)
SUCCESSIVE APPROXIMATION
b)
FLASH ADC
c)
R-2R LADDER
d)
BINARY WEIGHTED RESISTOR
128.
SAR stands for ________________
a)
FLASH ADC
b)
R-2R LADDER
c)
SUCCESSIVE APPROXIMATION REGISTER
d)
2R-4R LADDER
129.
The fastedt A/D converter is
a)
single slope ramp comparator A/D converter
b)
Dual slope integrator A/D converter
c)
Successive approximation A/D converter
d)
Counter type A/D converter
130.
Flash ADC consist of….converters
a)
2^n
b)
2^n-1
c)
2^n+1
d)
non of these
131.
flash ADC IS
a)
Serial ADC
b)
parallel ADC
c)
series -parallelADC
d)
SAR ADC
132.
The Ramp ADC uses a binary counter and digtal to analog converter to genertae a
a)
ramp equation
b)
ramp test waveform
c)
ramp input
d)
ramp output
133.
RAMP TYPE ADC is also known as the ___________
a)
stairstep-ramp
b)
SUCCESSIVE APPROXIMATION
c)
R-2R LADDER
d)
BINARY WEIGHTED RESISTOR
134.
DAC stands for ____________
a)
DATA TO AMPLITUDE CONVERTER
b)
DIGITAL to ANALOG converter
c)
DATA TO ANALOG CONVERTER
d)
NONE OF THE ABOVE
135.
A DAC, on the other hand, inputs a binary number and outputs an
a)
ANALOG CURRENT
b)
DIGITAL CURRENT
c)
DIGITAL VOLTAGE
d)
analog voltage or current signal
136.
A system that converts a digital signal into an analog signal is called
a)
ADC
b)
DAC
c)
AAC
d)
DDC
137.
What is the disdvantages of binary weighted type DAC?
a)
Rquire wide range of resistors
b)
High operating frequency
c)
high power consumption
d)
SLOW Switiching
138.
In a D-A converter with binary weighted resistor, a desired step size can be obtained by
a)
All of the mentioned
b)
selecting proper value of VFS
c)
Selecting proper value of R
d)
Selecting proper value of Rf
139.
In a binary ladder (R-2R),D/A converter ,the input resistance for each inpuy is
a)
R
b)
2R
c)
3R
d)
4R
140.
In ____________ type of DAC, the output voltage is the inverted sum of all the input voltages
a)
SUCCESSIVE APPROXIMATION
b)
R-2R LADDER
c)
2R-4R LADDER
d)
BINARY WEIGHTED RESISTOR
Reset
