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J277 Key Terms Homework 1

Total questions: 11

Worksheet time: 6mins

Name
Class
Date
1.

CPU

a)

“Decodes instructions. Sends signals to control how data moves around the CPU.”

b)

“Holds the result of calculations.”

c)

“The complete process of retrieving an instruction from store, decoding it and carrying it out.  Also known as the instruction cycle.”

d)

“The main part of the computer (the brain), consisting of the registers, ALU and control unit.”

2.

Fetch-execute cycle

a)

“Holds the address of the next instruction to be executed. Step 1 of the fetch, decode, execute cycle.”

b)

“The complete process of retrieving an instruction from store, decoding it and carrying it out.  Also known as the instruction cycle.”

c)

“Performs calculations e.g. x = 2 + 3 and logical comparisons e.g. IF x > 3 in the CPU

d)

“Holds the address of data ready for use by the memory data register, or the address of an instruction passed from the program counter. Step 2 of the fetch, decode, execute cycle.”

3.

ALU

a)

“Performs calculations e.g. x = 2 + 3 and logical comparisons e.g. IF x > 3 in the CPU.”

b)

“The main part of the computer (the brain), consisting of the registers, ALU and control unit.”

c)

“Memory in the processor providing fast access to frequently used instructions and data.”

d)

“Decodes instructions. Sends signals to control how data moves around the CPU.”

4.

CU

a)

“Decodes instructions. Sends signals to control how data moves around the CPU.”

b)

“Holds the data fetched from or to be written to the memory. Step 3 of the fetch, decode, execute cycle.”

c)

“Traditional computer architecture that forms the basis of most digital computer systems.  Instructions are fetched, decoded and executed one at a time.”

d)

“Holds the result of calculations.”

5.

Cache

a)

“Performs calculations e.g. x = 2 + 3 and logical comparisons e.g. IF x > 3 in the CPU.”

b)

“Holds the address of data ready for use by the memory data register, or the address of an instruction passed from the program counter. Step 2 of the fetch, decode, execute cycle.”

c)

“Memory in the processor providing fast access to frequently used instructions and data.”

d)

“Tiny areas of extremely fast memory located in the CPU normally designed for a specific purpose, where data or control information is stored temporarily e.g. the MAR, MDR etc.”

6.

Register

a)

“Performs calculations e.g. x = 2 + 3 and logical comparisons e.g. IF x > 3 in the CPU.”

b)

“Holds the address of data ready for use by the memory data register, or the address of an instruction passed from the program counter. Step 2 of the fetch, decode, execute cycle.”

c)

“Memory in the processor providing fast access to frequently used instructions and data.”

d)

“Tiny areas of extremely fast memory located in the CPU normally designed for a specific purpose, where data or control information is stored temporarily e.g. the MAR, MDR etc.”

7.

Von Neumann architecture

a)

“Decodes instructions. Sends signals to control how data moves around the CPU.”

b)

“Holds the data fetched from or to be written to the memory. Step 3 of the fetch, decode, execute cycle.”

c)

“Traditional computer architecture that forms the basis of most digital computer systems.  Instructions are fetched, decoded and executed one at a time.”

d)

“Holds the result of calculations.”

8.

MAR

a)

“Holds the address of the next instruction to be executed. Step 1 of the fetch, decode, execute cycle.”

b)

“The complete process of retrieving an instruction from store, decoding it and carrying it out.  Also known as the instruction cycle.”

c)

“Performs calculations e.g. x = 2 + 3 and logical comparisons e.g. IF x > 3 in the CPU

d)

“Holds the address of data ready for use by the memory data register, or the address of an instruction passed from the program counter. Step 2 of the fetch, decode, execute cycle.”

9.

MDR

a)

“Decodes instructions. Sends signals to control how data moves around the CPU.”

b)

“Holds the data fetched from or to be written to the memory. Step 3 of the fetch, decode, execute cycle.”

c)

“Traditional computer architecture that forms the basis of most digital computer systems.  Instructions are fetched, decoded and executed one at a time.”

d)

“Holds the result of calculations.”

10.

Program Counter

a)

“Holds the address of the next instruction to be executed. Step 1 of the fetch, decode, execute cycle.”

b)

“The complete process of retrieving an instruction from store, decoding it and carrying it out.  Also known as the instruction cycle.”

c)

“Performs calculations e.g. x = 2 + 3 and logical comparisons e.g. IF x > 3 in the CPU

d)

“Holds the address of data ready for use by the memory data register, or the address of an instruction passed from the program counter. Step 2 of the fetch, decode, execute cycle.”

11.

Accumulator

a)

“Decodes instructions. Sends signals to control how data moves around the CPU.”

b)

“Holds the data fetched from or to be written to the memory. Step 3 of the fetch, decode, execute cycle.”

c)

“Traditional computer architecture that forms the basis of most digital computer systems.  Instructions are fetched, decoded and executed one at a time.”

d)

“Holds the result of calculations.”