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WorksheetsVLSI Chip Design Quiz
Total questions: 20
Worksheet time: 13mins
Rifts are used for smooth flow through buses.
CMOS inverter has ______ output impedance.
low
high
very high
none of the mentioned
In inverter circuit ________ transistors is used as load
enhancement mode
depletion mode
all of the mentioned
none of the mentioned
In CMOS NAND gate, p transistors are connected in
series
parallel
cascade
random
Schottky barrier is created due to the difference in
voltages
thickness
work function
density
If both the transistors are in saturation, then they act as ________
current source
voltage source
divider
buffer
In basic inverter circuit _____________ is connected to ground.
source
gates
drain
resistance
Inverters are essential for ________
NAND gates
NOR gates
sequential circuits
all of the mentioned
Simulator converts circuit information to
design plan
does verification
set of equations
floor plan
If βn = βp, then Vin is equal to ________
Vdd
Vss
2Vdd
0.5Vdd
Gallium arsenide crystals are grown from
boron oxide
silicon oxide
silicon nitride
boron nitride
The accuracy of simulation depends on accuracy of
fabrication house parameters
electrical parameters
active parameters
functional parameters
If n-transistor conducts and has large voltage between source and drain, then it is said to be in _____ region.
linear
saturation
non saturation
cut-off
Which gate is faster?
AND
NAND
NOR
OR
Which gives the main electrical behaviour of various parts of the circuit?
circuit simulator
timing simulator
logic level simulator
functional simulator
CMOS inverter has ______ regions of operation.
three
four
two
five
Reduction in power dissipation can be brought by
increasing transistor area
decreasing transistor area
increasing transistor feature size
decreasing transistor feature size
What is the ratio of Zp.u/Zp.d?
1/4
4/1
1/2
2/1
The area of CMOS inverter is proportional to
area of n device
area of p device
total area of n and p device
square of minimum feature size
Which occupies lesser area?
Vdd pads
Vss pads
input pads
output pads
