Worksheetssekrit2
Total questions: 67
Worksheet time: 38mins
MOV CX, 03
wew : MOV AH, 02h
MOV DL 49
INT 21H
LOOP wew
Select All items that are correct
The assembly code will print number 1 three times
The assembly code will print letter i three times
The assembly code will loop three times based on the value of CX
The assembly code will allow users to enter only number 1 three times
Define a byte-sized data item
Db
Dw
Dd
Dq
Define a word sized data item
Db
Dw
Dd
Dq
Define a double word sized data item
Db
Dw
Dd
Dq
Define a quad word sized data item
Db
Dw
Dd
Dq
Which has 8 bit size?
Select all possible answers
AH
DL
[BX]
CX
MOV AH, 01H
Accept character input until A is entered
Invoke an interrupt function using the specified interrupt number
Compare AL register value with the ASCII value of A
Jump to label wew if the previous comparison is not equal
INT 21H
Accept character input until A is entered
Invoke an interrupt function using the specified interrupt number
Compare AL register value with the ASCII value of A
Jump to label wew if the previous comparison is not equal
CMP AL, 41H
Accept character input until A is entered
Invoke an interrupt function using the specified interrupt number
Compare AL register value with the ASCII value of A
Jump to label wew if the previous comparison is not equal
JNE wew
Accept character input until A is entered
Invoke an interrupt function using the specified interrupt number
Compare AL register value with the ASCII value of A
Jump to label wew if the previous comparison is not equal
How many cycles does a processor take to execute 2 billion instructions with a CPI of 2.5?
5 X 10 ^ 6
5 X 10 ^ 9
4 X 10 ^ 6
4 X 10 ^ 9
CPU
Central Processing Unit
Stores data and instructions
Handles communication with external devices
Connects and allows communication between all computer components
Memory
Central Processing Unit
Stores data and instructions
Handles communication with external devices
Connects and allows communication between all computer components
Input/Output
Central Processing Unit
Stores data and instructions
Handles communication with external devices
Connects and allows communication between all computer components
Motherboard
Central Processing Unit
Stores data and instructions
Handles communication with external devices
Connects and allows communication between all computer components
Which directive has the highest storage capacity
da
dq
dw
db
Given that a memory address can hold a character:
Assuming a sequence of characters being stored starting at address 200. In the given sequence here. ‘s’ is stored at address 200, ‘f’ is stored at address 201 and so on. This is of course following the concept of memory address being represented by hex values.
sfdgetzuqiw0298456$
What address holds a character with hex value of 7A?
(a)
Given that a memory address can hold a character:
Assuming a sequence of characters being stored starting at address 200. In the given sequence here. ‘s’ is stored at address 200, ‘f’ is stored at address 201 and so on. This is of course following the concept of memory address being represented by hex values.
sfdgetzuqiw0298456$
What is the final address of the last character?
(a)
Which is NOT TRUE?
None of the above
In MOV AH, 02, requested output is stored in DX
In MOV AH, 01, requested input is stored in AL
In MOV AH, 09, requested string output is stored in DX
Which of the following is/are INVALID
SELECT ALL POSSIBLE ANSWERS
MOV [BX], [202H]
MOV [CX], 41H
MOV CX, AL
MOV AL, [201H]
Memory Addressability
Contents of Memory are addressable by location
Execution is sequential
Data and instructions are within the shared memory
Sequential Execution
Contents of Memory are addressable by location
Execution is sequential
Data and instructions are within the shared memory
Shared Memory Repositories
Contents of Memory are addressable by location
Execution is sequential
Data and instructions are within the shared memory
EAX has 32 bits storage size
TRUE
FALSE
The (a) instruction in assembly language is used to move data from one location to another within a computer’s memory
Which of the ff is/are VALID?
SELECT ALL POSSIBLE ANSWERS
Int 20 grants an interrupt request
The lower bit accumulator of AX is used to store and determine the Interrupt request
Only one request is granted by a single invoke of int 21
Interrupt Requests are stored and can be remembered when invoked by INT 21
Which concepts is/are supported by Von Neumann Architecture?
SELECT ALL POSSIBLE
Contents of memory are addressable by location
Data and instruction are stored separately to different repositories
Data and instruction are within the shared memory repositories
Execution is sequential
Which is not a component of a computer system in top level?
I/O Module
IR
None of the Above
PC
What is the speedup if a program is 80% parrallelizable on 4 processors?
Calculate the speedup for a program with P = 0.8 and N = 4.
3.5
4.5
2.5
6.5
Maximum Speedup
A program is 90% parallelizable. What is the maximum speedup achievable?
6
4
10
2
It is composed of the bits of opcode and address
memory
instruction
Program Counter
Instruction Register
Which is NOT TRUE about ASSEMBLY LANGUAGE?
the language your computer can speak directly
used for direct hardware manipulation
provides a shorthand coding that can be assembled to work as close in machine level code
None of the above
The (a) register in X86 assembly language is commonly used for arithmetic operations.
Speedup Calculation
If a program is 70% parallelizable and runs on 8 processors, calculate the speedup
2.58
1.58
0.58
3.58
The (a) translates assembly language code into machine code that can be executed by the CPU
If a program is 50% parallelizable, what is the maximum possible speed-up?
Use P = 0.5 to calculate the theoretical maximum speed-up.
2
0
4
6
Which of the ff is TRUE about CMP
CMP can be used used in LOOP instructions
CMP works with just JMP to set condition
CMP allows comparison of Registers only
CMP flags the jumps instructions like JE and JNE to validate if condition is met
What is the parallelizable fraction if the speedup on 4 processors is 3?
8/9 or 89%
2/9 or 29%
5/9 or 59%
7/9 or 79%
Cache Memory
Stores frequently accessed data for faster retrieval
Stores both data and instructions for the CPU
Extends the available memory by using secondary storage
Stores data and instructions directly accessible by the CPU
Main Memory
Stores frequently accessed data for faster retrieval
Stores both data and instructions for the CPU
Extends the available memory by using secondary storage
Stores data and instructions directly accessible by the CPU
Virtual Memory
Stores frequently accessed data for faster retrieval
Stores both data and instructions for the CPU
Extends the available memory by using secondary storage
Stores data and instructions directly accessible by the CPU
Register
Stores frequently accessed data for faster retrieval
Stores both data and instructions for the CPU
Extends the available memory by using secondary storage
Stores data and instructions directly accessible by the CPU
CALCULATING CPI
A processor completes 1 billion instructions in 4 seconds with a clock speed of 2 GHz. What is the CPI.
8
12
8.5
10
EXECUTION TIME WITH CPI
A Processor with a clock speed of a 4 GHz and a CPI of 3 executes 500 million instructions. What is the execution time?
0.225 seconds
0.375 seconds
0.314 seconds
0.235 seconds
What is the speedup if a program has no parallelizable portion of (P = 0)
Calculate the speedup when P = 0.
0
1
-1
-2
Instructions
Composed of the bits of opcodes and address
Specifies the operation to be performed
Specifies a location in memory
Binary representation of assembly language instructions
Opcode
Composed of the bits of opcodes and address
Specifies the operation to be performed
Specifies a location in memory
Binary representation of assembly language instructions
Memory Address
Composed of the bits of opcodes and address
Specifies the operation to be performed
Specifies a location in memory
Binary representation of assembly language instructions
Machine Code
Composed of the bits of opcodes and address
Specifies the operation to be performed
Specifies a location in memory
Binary representation of assembly language instructions
MOV DL, AX is a valid movement of data
TRUE
FALSE
AX
Main Accumulator
Use for index of Memory Address
Performs counts specially with Looping
An output register
BX
Main Accumulator
Use for index of Memory Address
Performs counts specially with Looping
An output register
CX
Main Accumulator
Use for index of Memory Address
Performs counts specially with Looping
An output register
DX
Main Accumulator
Use for index of Memory Address
Performs counts specially with Looping
An output register
What is does this assembly code implies ?
MOV AH, 02H
MOV DL, [20BH]
INT 21H
None of the above
A character stored in memory address 20B will be printed
A series of characters stored starting at memory address 20B will be printed
A character with hex value of 20B will be printed
Clock Rate from CPI
If a program with 5 billion instructions has a CPI of 2 and takes 5 second to execute, what is the clock speed of the processor?
4.3 GHz
2 GHz
2.2 GHz
1 GHz
Given:
MOV AH, 01
INT 21
INC AL
INC AL
INC AL
MOV AH, 02
MOV DL, AL
INT 21
INT 20
What is the the if the user entered 1?
1
None of the above
A
3
After the CPU generated an opcode, the next stage in the process is the (a) where the CPU retrieves the opcode from memory
MOV CX, 03 wew: MOV AH, 02H MOV D, 49 INT 21H LOOP wew
The assembler code will loop three times based on the value of CX. The assembly code will print the number 1 three times
A character stored in memory address 208 will be printed
A string message pointed by the memory address message will be displayed
MOV AH, 02H MOV DL, [20BH] INT 21H
The assembler code will loop three times based on the value of CX. The assembly code will print the number 1 three times
A character stored in memory address 208 will be printed
A string message pointed by the memory address message will be displayed
MOV AH, 09H LEA DX, [msg] INT 21H
The assembler code will loop three times based on the value of CX. The assembly code will print the number 1 three times
A character stored in memory address 208 will be printed
A string message pointed by the memory address message will be displayed
In cache memory, If the address delivered from the CPU is not yet stored, what will most likely happen?
Main Memory will be accessed and a line from cache will be allocated
Address will be ignored and no line will be allocated in the cache
CPU will directly receive it back and perform instruction from main memory
The cache memory will not be accessible
Number of Processors
How many processors are needed to achieve a speedup of 6 if the program is 80% parallelizable?
0.0111
0.0316
0.0211
0.0333
What does the ff Assembly code implies?
wew: MOV AH, 01H
INT 21H
CMP AL, 41H
JNE wew
continuously accept characters input for as long as it is not A
continuously accept characters input for as long as it is A
continuously prints the character A
continuously accept characters input for as long as it is NOT 1
INT 21 terminates the request
TRUE
FALSE
Instruction Count from CPI
A program runs on a 3 GHz processor for 6 seconds with a CPI of 3. How many instructions are executed?
5 X 10 ^ 4
2 X 10 ^ 4
6 X 10 ^ 9
4 X 10 ^ 6
A program is 90% parallelizable. How many processors are needed to achieve a speedup of 8?
Solve for N when P = 0.9 and S = 8
38
36
32
30
