WorksheetsY12 progress exam DIRT lesson
Total questions: 35
Worksheet time: 29mins
The part of the CPU that controls the flow of data and the FDE cycle is the:
Control Unit
Arithmetic Logic Unit
Cache
Registers
The part of the CPU that handles computational logic and mathematics is:
Control Unit
Arithmetic Logic Unit
Cache
Registers
The part of the CPU that is fast storage for the quick access is:
Control Unit
Arithmetic Logic Unit
Cache
Registers
The main registers of the CPU are:
Program Counter, Current instruction Register, Accumulator, Memory Address Register, Memory Data Register
Program Current, Current instruction Register, Accumulator, Memory Adding Register, Memory Data Register
Program Counter, Current instruction Register, Accumulator, Memory Adding Register, Memory Instruction Register
Program Compiler, Current instruction Register, Accessing, Memory Address Register, Memory Instruction Register
Which register is described: The register holds the address of the next instruction to be executed. This ensures that the program runs in order and the correct thing is fetched for the next cycle.
Program Counter (PC)
Memory Address Register (MAR)
Memory Data Register (MDR)
Current Instruction Register (CIR)
Accumulator (ACC)
Which register is described: The register is a important register which holds the results of any processing – it is essentially the working memory of the CPU, so anything which has been calculated by the ALU will be sent to this register.
Program Counter (PC)
Memory Address Register (MAR)
Memory Data Register (MDR)
Current Instruction Register (CIR)
Accumulator (ACC)
Which register is described: The register holds the current instruction during processing. The next stage of the F-D-E cycle – the MDR is copied to this register. At this point, the PC is incremented.
Program Counter (PC)
Memory Address Register (MAR)
Memory Data Register (MDR)
Current Instruction Register (CIR)
Accumulator (ACC)
Which register is described: The register holds the memory location of data/instructions which must be fetched. This is instrumental to the fetch-decode-execute cycle – each cycle, the PC is copied into this register to get the next instruction.
Program Counter (PC)
Memory Address Register (MAR)
Memory Data Register (MDR)
Current Instruction Register (CIR)
Accumulator (ACC)
Which register is described: The register stores data/instructions which are coming from or going to the memory. Again, this is needed to run the F-D-E cycle. The next instruction will be fetched to this register from RAM, so that it can be decoded.
Program Counter (PC)
Memory Address Register (MAR)
Memory Data Register (MDR)
Current Instruction Register (CIR)
Accumulator (ACC)
At the start of the F-D-E Cycle the PC copies its value to the (a)
How many data busses are there in the CPU?
1
2
3
Which bus allows for signals to be sent around the CPU allowing everything to be Co-Ordinated?
Control Bus
Address Bus
Data Bus
Which bus carries data addresses between the processor and memory?
Control Bus
Address Bus
Data Bus
Which bus carries data between the processor, memory and input/output devices?
Control Bus
Address Bus
Data Bus
Which performance factor of the CPU is measured in GHz, and is a measure of the frequency of FE cycles?
Cores
Cache Size
Clock Speed
Pick the option below which is the correct access order of memory by the CPU?
Registers
Cache
RAM
Secondary
Cache
RAM
Secondary
Registers
RAM
Secondary
Registers
Cache
Secondary
RAM
Cache
Registers
What is the role of the ACC?
Stores the results of calculations made by the ALU
Stores the most recently fetched instruction that is waiting to be decoded and executed
Stores the data that has been fetched from or stored in memory
Keeps track of the memory location of the line of machine code being executed. It changes to point to the next instruction needed for the FDE cycle allowing the program to be executed in sequence
Stores the address of the data or instructions that are to be fetched from or sent to
what's the name of the external css file here?
(a)
Match the following
Equal time slice per job
Round robin
Looks at the job with the shortest job and processes that first
SJF
Looks at the job with the shortest time left which can jump the queue
STR
Has different queues for various priorities
Multi-level feedback
Goes to the first job that comes into the processor
FCFS
Reorder the following
Checks for interrupts after FDE cycle finishes
If interrupt places next FDE cycles on a stack in memory
Loads in the ISR
Completes all the FDE cycles for the ISR
If no further interrupts reloads the FDE cycles back into memory
<p> is the opening tag for a _____________
page
paragraph
preorder
period
Which character is used to indicate an end tag?
!
#
/
\
According to the FCFS scheduling algorithm, how are processes executed?
Based on priority levels
In the order they arrive
Randomly
Based on shortest job first
Organize these options into the right categories
PC
MAR
MDR
CIR
Accumulator
ALU
CU
CPU
GPU
<ol>
<li>Home</li>
<li>About Us</li>
<li>Contact Us</li>
<li>Blog</li>
</ol>
What is the correct HTML for creating a hyperlink?
<a href="http://www.w3schools.com">W3Schools</a>
<a url="http://www.w3schools.com">W3Schools.com</a>
<a>http://www.w3schools.com</a>
<a name="http://www.w3schools.com">W3Schools.com</a>
Convert 1.0111010 0100 (Floating Point Binary) to denary
-7.25
-9.5
-8.75
-9.125
In normalised floating point form, a positive number always has what beginning?
01
10
101
001
A floating point binary number looks like: 10001.110 0011
The bit in bold represents the..?
(a)
A floating point binary number looks like: 10111.110 0011
The bit in bold represents the..?
(a)
Please identify the numbers that are in normalised floating point format.
101001001
111110000
011111111
10000000
010000000
