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WorksheetsComputer Architecture Quiz
Total questions: 105
Worksheet time: 2hrs 48mins
Choose the most four basic functions of a computer.
Moving data, storing data, processing data, controlling.
Supporting operating system, accessing hard disks, supporting network connections, supporting HDMI ports.
Reading disks, accessing network resources.
Reading data from keyboard, printing data to monitor, allowing network connections.
Refers to the operational units and their interconnections that realize the architectural specifications.
Computer architecture
Computer function
Computer organization
Instruction set architecture
What is the most important function of the control unit (CU)?
It manages the order of running instructions.
It will read and process data from main memory.
It directs the operation of the other CPU components.
It will read instructions from main memory then decoding them.
The first generation of computers used _______ for digital logic elements and memory.
Transistor
Integrated Circuits
Large-scale integration
Vacuum Tubes
What is Memory Address Register (MAR)?
Contains a word to be stored in memory or sent to the I/O unit, or is used to receive a word from memory or from the I/O unit.
Employed to hold temporarily the righthand instruction from a word in memory.
Contains the address in memory of the word to be written from or read into the MBR.
Contains the address of the next instruction pair to be fetched from memory.
What is false about the von Neumann architecture?
Data and instructions are stored in a single read-write memory.
The contents of this memory are addressable by location, without regard to the type of data contained there.
Execution occurs in a sequential fashion (unless explicitly modified) from one instruction to the next.
Data is stored in main memory and instructions are stored in cache memory.
What is the maximum addressable memory of a 32-bit microprocessor with 24-bit address?
16 GB
16 MB
16 Gbits
16 Mbits
_______ interprets the instructions in memory and causes them to be executed.
Registers
CPU interconnection
Arithmetic and Logic Unit (ALU)
I/O Modules
Control Unit (CU)
What is the most important characteristic of the Synchronous Bus?
Data is transmitted at the same time.
The occurrence of one event on a bus follows and depends on the occurrence of a previous event.
The occurrence of events on the bus is determined by a clock.
No common clock signal controlling operation.
What is the correct order of memory access speed from fastest to slowest?
Registers > Cache > RAM > SSD
Cache > Registers > RAM > SSD
Registers > Cache > SSD > RAM
Cache > Registers > SSD > RAM
All of the mentioned are wrong
What is the special feature of Memory Cache?
Allows faster access than DRAM memory
Memory cache is outboard storage memory
Allows faster access than CPU registers
What is the special feature of Memory Cache?
Allows faster access than DRAM memory
Memory cache is outboard storage memory
Allows faster access than CPU registers
Fixed memory - Read Only Memory
Has a larger capacity than HDD
In the direct mapping method from 256MB main memory with 512KB cache, what is the number of bits for the TAG element in the address?
6
7
8
9
A byte addressable microprocessor has 24-bit address. What is maximum memory capacity?
4 MegaByte
8 MegaByte
16 MegaByte
32 MegaByte
In error correcting code (single ECC), how many bits are used to correct one bit in 8-bit data?
4
5
6
7
What is correct about increasing performance and endurance?
Hard Disk - DRAM - NAND Flash - SRAM
Hard Disk - NAND Flash - DRAM - SRAM
NAND Flash - Hard Disk - SRAM - DRAM
Hard Disk - DRAM - SRAM - NAND Flash
With the hard disk data layout, the set of all the tracks in the same relative position on the platter is called
Cylinder
Tracks
Inter-track gap
Sector
Which RAID level uses striping technique with a minimum of 3 disks and provides fault tolerance through the use of parity bit?
RAID 0
RAID 1
RAID 2
RAID 3
In terms of performance, what is the main advantage of a solid state drive over a magnetic disk?
A solid state drive has faster access time, lower latency, and higher reliability
A solid state drive has larger capacity, lower power consumption, and lower cost
A solid state drive has better compatibility, longer lifespan, and higher security
A solid state drive has none of the mentioned advantages over a magnetic disk
Consider the expression: NOT(A + B) = ? Apply DeMorgan's Theorem to replace at '?'
NOT A AND NOT B
NOT A OR NOT B
NOT A AND B
A OR NOT B
An I/O module must recognize one unique address for each peripheral it controls. (2) I/O channels are commonly seen on microcomputers, whereas I/O controllers are used on mainframes. The statement 1 is and 2 is:
true, false
true, true
false, true
false, false
What is an interrupt vector?
Part of memory which contains the addresses of interrupt handlers
A signal an I/O device sends to CPU
A signal an I/O software sends to CPU
None of the mentioned
If the operation involves reference to an operand in memory or available via I/O, then determine the address of the operand.
Operand fetch
Data operation
Operand store
Operand address calculation
What role does an Application Programming Interface (API) play in software development?
It allows program access to hardware resources using high-level language libraries
It defines low-level machine instructions
It provides a standard for binary portability
It manages system resources for the operating system and machine language instructions
What is the initial state of a process when it is admitted by the high-level scheduler, but not yet ready to execute?
New
Ready
Running
Halted
What is the initial state of a process when it is admitted by the high-level scheduler, but not yet ready to execute?
New
Ready
Running
Halted
Which of the following statements is incorrect about Translation Look-aside Buffer (TLB)?
The use of TLB eliminates the need for keeping a page table in memory
TLB only maintains a subset of the entries stored in the full memory-based page table
When there is a TLB miss the system needs to access the page table
A translation lookaside buffer (TLB) is a memory cache that stores the recent translations of virtual memory to physical memory
How does Boolean algebra contribute to the design of digital circuits?
It simplifies the implementation of desired functions
It helps in the analysis of economic data
It facilitates the design of analog circuits
It is primarily used for chemical engineering and physical engineering
When both inputs are 1, what is the result of a NAND gate?
0
1
2
Undefined
#NA
What is the result of 10100101 XOR 11001001?
11101101
10000001
01101100
10101100
What is the result of left rotating 10110101 by 2 bits?
01101011
10101101
01101101
11010110
11010100
Why is it essential to use symbolic representation of machine instructions?
It makes machine instructions more human-readable and understandable
It reduces the overall complexity of computer systems and user programs
It minimizes the need for memory storage for the user programs
It enables fastest execution of high-level language instructions
What are the most important general categories of data that machine instructions operate on?
Addresses, numbers, characters, and logical data
Text, images, and audio
Variables, functions, and arrays
Instructions, control signals, and registers
What is a branch instruction?
The instructions that are used to divide a program into multiple subprograms
The instructions that have as one of its operands the address of the next instruction to be executed
The instructions that are used to pause the program
The instructions that are used to return to the beginning of the program
The effective address of Register indirect addressing mode is:
EA = R
EA = (R)
EA = (R)+A
EA = (R)+(A)
Which of the following PDP series computers is known for its use of 12-bit instructions and a single general-purpose register, the accumulator?
PDP-8
PDP-10
PDP-11
PDP-6
What is the main difference between x86 and ARM instruction formats?
x86 instructions are variable in length, while ARM instructions are fixed
x86 instructions are fixed in length, while ARM instructions are variable
Both x86 and ARM instructions are fixed in length
Both x86 and ARM instructions are variable in length
What is the primary purpose of the "Fetch instruction" phase in the operation of a processor?
To read an instruction from memory
To interpret the instruction
To perform arithmetic operations on data
To wr
What is the primary purpose of the "Fetch instruction" phase in the operation of a processor?
To read an instruction from memory
To interpret the instruction
To perform arithmetic operations on data
To write data to memory
Control and status registers are used by which entities to control the operation of the processor?
Privileged, operating system programs
Machine or assembly language programmers
External I/O devices
Main memory modules
What is the significance of the program counter (PC) in the fetch phase of the instruction cycle?
The program counter (PC) is not used in the fetch phase, and its role is limited to tracking the number of instructions executed by the CPU
The program counter (PC) in the fetch phase holds the memory address of the next instruction to be fetched and executed
The program counter (PC) is responsible for executing instructions and has no specific role during the fetch phase
The program counter (PC) is only relevant in multi-core processors and does not contribute to the fetch phase of the instruction cycle in single-core systems
Which of the following statements is correct in the context of Instruction Pipelining?
Instruction Pipelining reduces the efficiency of instruction execution by introducing delays and dependencies between instructions
Instruction Pipelining is only effective for specific types of instructions and has no impact on the overall efficiency of instruction execution
Instruction Pipelining enhances efficiency by enabling simultaneous execution of multiple instructions in different stages, boosting overall throughput
Instruction Pipelining improves efficiency by processing multiple instructions simultaneously, reducing execution time. However, it can face challenges like hazards, introducing delays and impacting overall performance
Which statement is incorrect about RISC and CISC architecture?
CISC architecture is more convenient for programmers than RISC architecture.
CISC architecture has more operands in an instruction compared to RISC architecture.
CISC architecture has a more flexible instruction set than RISC architecture.
CISC architecture requires more general-purpose registers than RISC architecture.
What is one of the advantages of using a register file in computer architecture?
Reduction in memory accesses, saving time
More efficient use of space due to dynamic adaptation
Efficient handling of both local and global variables
Easier management of cache residency
How does pipelining in a RISC architecture handle branch instruction?
By using NOOP instructions inserted by the compiler or assembler
By eliminating branch instructions from the instruction stream
By executing branch instructions in a separate pipeline
By delaying all instructions until branch instructions are executed
What is the benefit of using a superscalar organization over a scalar organization?
It increases the instruction throughput and improves the performance
It reduces the power consumption and the heat dissipation
It simplifies the instruction set
What does the term "instruction-level parallelism" refer to in computer architecture?
The degree to which instructions in a program can be executed in parallel
The number of processor cores in a multi-core CPU with multiple resources
The complexity of the instruction set architecture
The length of an instruction cycle with high-level programming language
"Multiple processors share a single memory or pool of memory by means of a shared bus or other interconnection mechanism; a distinguishing feature is that the memory access time to any region of memory is approximately the same for each processor." Which concept does the statement belong to?
Symmetric multiprocessor (SMP)
Nonuniform memory access (NUMA)
Cluster
Single instruction, multiple data (SIMD)
Which write technique ensures that all write operations are made to main memory as well as to the cache, ensuring that main memory is always valid?
Write through
Write back
Write around
No write allocate
What is one advantage of Nonuniform Memory Access (NUMA) over Uniform Memory Access (UMA)?
NUMA provides each processor with its own local memory, reducing memory access times
NUMA allows all processors to access the same memory location simultaneously
NUMA is easier to implement than UMA
NUMA provides limited memory capacity
Following Amdahl's law for multiprocessors, if only 10% of the code is inherently serial (f = 0.9), running the program on a multicore system with 4 processors, the performance gain (speedup factor) would be:
307%
297%
317%
327%
What is the most common mapping technique used in cache memory in modern computers?
Direct Mapping
Fully Associative
Set Associative
None of the mentioned
What are the basic functions of a computer?
What is computer organization?
What is the most important function of the Control Unit (CU)?
What is the most important function of the Control Unit (CU)?
It manages the execution of instructions.
It stores data temporarily.
It directs the operation of the other CPU components
It performs arithmetic operations.
What did the first generation of computers use as logic elements and memory?
Transistors
Integrated Circuits
Large-Scale Integration
Vacuum Tubes
What is the MAR register?
It stores the data to be processed.
It contains the address in memory of the word to be written from or read into the MBR
It manages the execution of instructions.
It is used for temporary storage.
What types of peripheral devices are included in a computer?
Human readable
Communication
Machine readable
Data Conversion
What is incorrect about the von Neumann architecture?
Data and instructions are stored in separate memory.
Data is stored in main memory and instructions are stored in cache memory.
It uses a single memory for both data and instructions.
It allows for parallel processing.
What is the maximum memory that a 32-bit processor with a 24-bit address bus can access?
8 MB
16 MB
32 MB
64 MB
Which component interprets instructions in memory and executes them?
Arithmetic Logic Unit
Memory Address Register
Control Unit (CU)
Data Bus
What is the most important characteristic of a Synchronous Bus?
It allows for asynchronous communication.
The occurrence of events on the bus is determined by a clock.
It can transfer data at any time.
It is faster than an Asynchronous Bus.
What is the order of memory access speed from fastest to slowest?
Registers > Cache > RAM > SSD
Cache > RAM > SSD > Registers
RAM > SSD > Registers > Cache
SSD > Registers > Cache > RAM
What is the important characteristic of Memory Cache?
Allows faster access than DRAM memory
Is slower than RAM
Is used for permanent storage
Is larger than RAM
What is the number of bits in the TAG in direct mapping?
5
7
9
11
What is the maximum memory capacity of a 24-bit address processor?
8 MB
16 MB
32 MB
64 MB
How many bits?
What is the maximum memory capacity of a 24-bit address processor?
8 MB
16 MB
32 MB
64 MB
How many bits are used to correct one bit error in 8-bit data?
2
3
4
5
What is the order of devices from slowest to fastest?
Hard Disk - NAND Flash - DRAM - SRAM
NAND Flash - Hard Disk - SRAM - DRAM
SRAM - DRAM - NAND Flash - Hard Disk
DRAM - SRAM - Hard Disk - NAND Flash
What is a 'Cylinder' in a hard disk?
Cylinder
Track
Sector
Head
Which RAID uses striping and parity?
RAID 0
RAID 1
RAID 3
RAID 5
What is the main advantage of SSD over HDD?
Lower cost
Higher speed and reliability
Larger capacity
Longer lifespan
DeMorgan's theorem: NOT(A + B) = ?
NOT A OR NOT B
NOT A AND NOT B
A AND B
A OR B
Evaluate the truth of two statements about I/O module and I/O controller.
true, false
false, true
true, true
false, false
What is an interrupt vector?
A part of memory which contains the addresses of interrupt handlers
A type of CPU register
A memory address
A type of interrupt
When an operation needs to fetch operands from memory or I/O, which step will be performed?
Operand address calculation
Data fetching
Instruction decoding
Execution
What is the role of API in software development?
It allows program access to hardware resources using high-level language libraries
It is a programming language
It is a type of software
It is a hardware component
What is the initial state of a process when it is granted permission but not ready to execute?
New
Ready
Running
Blocked
Which of the following statements is incorrect about Translation L?
Which of the following statements is incorrect about Translation Look-aside Buffer (TLB)?
How does Boolean algebra contribute to the design of digital circuits?
When both inputs are 1, what is the result of a NAND gate?
(a)
What is the result of 10100101 XOR 11001001?
(a)
What is the result of left rotating 10110101 by 2 bits?
(a)
Why is it essential to use symbolic representation of machine instructions?
What are the most important general categories of data that machine instructions operate on?
What is a branch instruction?
The effective address of Register indirect addressing mode is:
(a)
The effective address of Register indirect addressing mode is:
(a)
Which of the following PDP series computers is known for its use of 12-bit instructions and a single general-purpose register, the accumulator?
(a)
What is the main difference between x86 and ARM instruction formats?
What is the primary purpose of the "Fetch instruction" phase in the operation of a processor?
Control and status registers are used by which entities to control the operation of the processor?
What is the significance of the program counter (PC) in the fetch phase of the instruction cycle?
Which of the following statements is correct in the context of Instruction Pipelining?
Which statement is incorrect about RISC and CISC architecture?
What is one of the advantages of using a register file in computer architecture?
How does pipelining in a RISC architecture handle branch instruction?
What is the benefit of using a superscalar organization over a scalar organization?
What does the term "instruction-level parallelism" refer to in computer architecture?
"Multiple processors share a single memory or pool of memory by means of a shared bus or other interconnection mechanism..." Which concept does the statement belong to?
Which write technique ensures that all write operations are made to main memory as well as to the cache, ensuring that main memory is always valid?
(a)
What is one advantage of Nonuniform Memory Access (NUMA) over Uniform Memory Access (UMA)?
