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CPU Quiz

Total questions: 16

Worksheet time: 12mins

Name
Class
Date
1.

What is the primary role of a compiler?

a)

To execute high-level code line by line during runtime.

b)

To translate the entire high-level program into machine code before execution, creating an executable file.

c)

To translate machine code back into a high-level language for debugging.

d)

To manage the CPU's cache memory.

2.

Which of the following best describes machine code?

a)

A high-level language that is easy for humans to read and write.

b)

A set of mnemonics representing CPU operations, specific to a CPU family.

c)

Binary sequences (0s and 1s) that are directly understood and executed by the CPU.

d)

The comments and documentation written by programmers.

3.

In the context of machine code instructions, what does the 'opcode' (operation code) typically specify?

a)

The memory address where the data for the operation is located.

b)

The actual data value to be used in an operation.

c)

The specific operation to be performed by the CPU (e.g., ADD, LOAD, STORE).

d)

The size of the operand or data.

4.

An interpreter translates high-level code:

a)

All at once into an executable file, which is then run.

b)

Line by line, executing each line immediately after translation.

c)

Into assembly language, which then requires an assembler.

d)

Directly into electrical signals without an intermediate code.

5.

The term 'mnemonic' in assembly language refers to:

a)

A numerical representation of a CPU instruction.

b)

A short, easy-to-remember symbolic code for a CPU instruction (e.g., LDA for Load Accumulator).

c)

A type of CPU register that stores memory addresses.

d)

The part of an instruction that specifies the data or address (the operand).

6.

What are the three main stages of the CPU's Fetch-Decode-Execute cycle, in the correct order?

a)

Decode, Execute, Fetch

b)

Fetch, Execute, Decode

c)

Fetch, Decode, Execute

d)

Execute, Store, Fetch

7.

Which CPU register holds the memory address of the next instruction to be fetched from RAM?

a)

Memory Address Register (MAR)

b)

Program Counter (PC)

c)

Current Instruction Register (CIR)

d)

Accumulator (ACC)

8.

The Data Bus in a computer system is primarily characterized as:

a)

Unidirectional, carrying addresses from the CPU to memory.

b)

Bidirectional, carrying data and instructions between the CPU, memory, and I/O devices.

c)

Unidirectional, carrying control signals from the Control Unit.

d)

A temporary storage location within the CPU.

9.

What is the name given to the complete list of commands and instructions that a specific CPU can understand and process?

a)

Command Index

b)

Execution Library

c)

Instruction Set

d)

Register Manifest

10.

Which of these CPU characteristics typically has the most direct impact on the number of simple instructions it can process per second?

a)

The brand of the motherboard

b)

The size of the CPU's heat sink

c)

The CPU's clock speed

d)

The number of available USB ports

11.

Having multiple cores in a CPU primarily allows a computer to:

a)

Increase the speed of a single, simple task dramatically.

b)

Store significantly more data within the CPU itself.

c)

Perform multiple tasks or processes simultaneously (multitasking/parallel processing).

d)

Eliminate the need for RAM.

12.

Which of the following system components, when upgraded, generally leads to a significant improvement in overall PC responsiveness, especially when launching applications and handling large files?

a)

A higher resolution monitor

b)

Replacing a Hard Disk Drive (HDD) with a Solid State Drive (SSD)

c)

A keyboard with more macro keys

d)

A larger computer case

13.

True or False: Assembly language is a high-level language that is portable across different CPU architectures without any modification.

a)

True

b)

False

14.

True or False: A single line of high-level code (e.g., in Python) often translates into many lines of assembly language or machine code instructions.

a)

True

b)

False

15.

True or False: The Memory Address Register (MAR) is responsible for temporarily holding data that has been fetched from memory or is about to be written to memory.

a)

True

b)

False

16.

A CPU is advertised with a clock speed of 3.5 GHz. This means the CPU can:

a)

Execute 3.5 billion individual high-level programming language instructions (like single lines of Python) every second.

b)

Perform exactly 3.5 billion full Fetch-Decode-Execute cycles for any type of machine instruction every second.

c)

Complete 3.5 billion clock cycles (or 'ticks') per second, which synchronize the steps involved in executing much simpler machine code instructions.

d)

Directly transfer 3.5 billion bytes of data to RAM every second, synchronized with its clock.