Font size
WorksheetsCEA201 FE1
Total questions: 152
Worksheet time: 1hrs 16mins
Computer technology is changing at a __________ pace.
slow
slow to medium
rapid
non-existent
Computer _________ refers to those attributes that have a direct impact on the logical execution of a program.
organization
specifics
design
architecture
Architectural attributes include __________ .
I/O mechanisms
control signals
interfaces
memory technology used
_________ attributes include hardware details transparent to the programmer.
Interface
Organizational
Memory
Architectural
It is a(n) _________ design issue whether a computer will have a multiply instruction.
architectural
memory
elementary
organizational
It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit or by a mechanism that makes repeated use of the add unit of the system.
architectural
memory
mechanical
organizational
A __________ system is a set of interrelated subsystems.
secondary
hierarchical
complex
functional
An I/O device is referred to as a __________.
CPU
control device
peripheral
register
When data are moved over longer distances, to or from a remote device, the process is known as __________.
data communications
registering
structuring
data transport
The _________ stores data.
system bus
I/O
main memory
control unit
A common example of system interconnection is by means of a __________.
register
system bus
data transport
control device
The __________ moves data between the computer and its external environment.
data transport
I/O
register
CPU interconnection
A _________ is a mechanism that provides for communication among CPU, main memory, and I/O.
system interconnection
CPU interconnection
peripheral
processor
_________ provide storage internal to the CPU.
Control units
ALUs
Main memory
Registers
The __________ performs the computer's data processing functions.
Register
CPU interconnection
ALU
system bus
The ALU makes use of ______ to store the immediate results.
Accumulators
Registers
Heap
Stack
Computer architecture refers to (Select all correct answers):
Design idea
Install specific hardware
The operational units in the computer and their interconnections
The attributes that have a direct impact on the logical execution of a program
When considering whether a computer has a multiply instruction, we are referring to:
Computer organization
Computer architecture
Computer hardware
Computer software
When considering the memory technology used, we are referring to:
Computer hardware
Computer software
Computer organization
Computer architecture
Software compatibility, in point of view of the architecture, want to mention that:
Ability to use old software on new machines
Ability to use new software on old machines
Ability to use old software on new machines that belong to the same architecture as the old one
Ability to use new software on old machines that belong to the same architecture with new machines
Who are interested in computers with architectural look?
Application Programmer
System Programmer
HLL Programmers
All of the others
Who are interested in computers with organizational look?
Computer Designer
Compiler Designer
System Programmer
None of the others
Statement I: Structure is the way in which the components are interrelated. Statement II: Function is the operation of each individual component as part of the structure. Which of the above statements are true?
Statement I is true
Statement II is true
Both the statements are true
Both the statements are false
The basic functions of the computer:
Data storage, run programs, connect to peripherals, access memory
Data movement, control, execute instructions, data processing
Data storage, data movement, data processing, control
Control, data storage, perform calculations, connect to the internet
The basic functions of the computer:
Data storage, run programs, connect to peripherals, access memory
Data movement, control, execute instructions, data processing
Data storage, data movement, data processing, control
Control, data storage, perform calculations, connect to the internet
The basic components of the computer:
RAM, CPU, hard drive, system interconnection
Memory system, system interconnection, ROM, keyboard
Memory system, CPU, monitor, mouse
Memory system, CPU, I/O, system interconnection
The main structured components of a processor (Not including internal interconnection):
Control unit, registers, I/O ports
Control unit , ALU, registers
Registers, DACs, control unit
ALU, registers, I/O ports
The memory system of computers include:
Cache, external memory
External memory, ROM
Optical disc, internal memory
Internal memory, external memory
A common example of system interconnection is by means of a .........., consisting of a number of conducting wires to which all the other components attach.
Address Bus
Data Bus
System Bus
Control Bus
In the computer, there are the following types of system interconnections:
Instruction, function, control
Control, data, address
Data, dependent, control
Data, control, auxiliary
Another word for the CPU is______
Executer
Microprocessor
Microchip
Decoder
The _________ was the world's first general-purpose electronic digital computer.
UNIVAC
MARK IV
ENIAC
Hollerith's Counting Machine
The Electronic Numerical Integrator and Computer project was a response to U.S. needs during _________.
the Civil War
the French-American War
World War I
World War II
The ENIAC used __________.
vacuum tubes
integrated circuits
IAS
The ENIAC is an example of a _________ generation computer.
first
second
third
fourth
The __________ interprets the instructions in memory and causes them to be executed.
main memory
control unit
I/O
arithmetic and logic unit
The memory of the IAS consists of 1000 storage locations called __________.
opcodes
wafers
VLSIs
words
The __________ contains the 8-bit opcode instruction being executed.
memory buffer register
instruction buffer register
instruction register
memory address register
During the _________ the opcode of the next instruction is loaded into the IR and the address portion is loaded into the MAR.
execute cycle
fetch cycle
instruction cycle
clock cycle
Second generation computers used __________.
integrated circuits
Transistors
vacuum tubes
large-scale integration
The __________ defines the third generation of computers.
integrated circuit
vacuum tube
transistor
VLSI
The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the clock rate.
multicore
GPU
data channels
MPC
With the __________, Intel introduced the use of superscalar techniques that allow multiple instructions to execute in parallel.
Core
8080
80486
Pentium
The __________ measures the ability of a computer to complete a single task.
clock speed
speed metric
execute cycle
cycle time
ARM processors are designed to meet the needs of _________.
embedded real-time systems
application platforms
secure applications
all of the above
One increment, or pulse, of the system clock is referred to as a _________.
clock tick
cycle time
clock rate
cycle speed
In the concept of "stored program", the computer fetches instructions ........
from memory
from opening/closing of electrical switches
from program
from hard disk
The concept of "stored program" allows:
The program can be altered directly through the values stored in memory
Many algorithms can be implemented inside the machine without having to rewire
Reduce time of program execution
All of the others
Von Neumann is computer: (Select all correct answers)
Only one processor, execute sequential instructions
Perform the program located inside the memory
Can execute multiple instructions simultaneously (in parallel)
All of the others
So far, computers have grown through:
3 generations
4 generations
5 generations
6 generations
During the development process of the computer, which of the following statements is true:
The first generation uses a vacuum tube
The third generation uses transistors
The fourth-generation uses SSI and MSI
None of the others
During the development process of the computer, which of the following statements is false:
The second generation uses transistors
The first generation uses vacuum tube
The fourth generation uses integrated circuit
The third generation uses transistor
When did the first transistor be invented?
1947
1958
1969
1971
According to Moore's Law, the number of transistors will double after each:
16 months
18 months
20 months
22 months
The invention of integrated circuit brought us ........ of computers.
The second generation
The third generation
The fourth generation
The fifth-generation
A silicon piece with electronic circuits on it is called........
Circuit
Logic gate
Chip
Circuit network
Which parameters in a computer family are similar or identical?
Instruction set
Number of I/O ports
Speed
Operation system
Which parameters in a computer family are increased from the old machine to the newer one?
Speed
Memory size
Cost
All of the above
Which of the following are the basic factors in the commercial success of a computer? (Select all correct answers)
Performance
Cost
Speed
Memory size
What are the main goals of a computer system?
To provide the best performance at a low cost
To provide speedy operation at low power consumption
To provide optimal power operation
None of the others
This figure show what is the current processor development trend? (Select all correct answers)
Increasing number of transistors on a single chip
Multicore (placing multiple processors on the same chip)
Building a more complex processor
Increasing clock rate
In the given figure, black rectangles are ........
Vacuum tubes
Transistors
Integrated circuits
All of the others
Balance of performance is to ........
Make the processor run faster
Make the processor operate more efficiently
Make the processor and other important components of computers run faster
Make the processor and other important components of computers operate more efficiently
Which of the following is not a solution to balance performance?
Reduce the frequency of memory access
Increase the number of bits that are retrieved at one time
Increase the interconnect bandwidth between processors and memory
None of the others
An approach to increase the speed of the processor is ........
Dedicate a part of the processor chip for the cache
Increase the clock rate
Use pipelining
All of the above
Which of the following is not a reason for moving to multicore organizations?
The benefits of applying pipeline technology as well as increasing levels of cache on the processor
Effect of the resistor and parasitic capacitance between the transistors on a chip
Problem of dissipating heat on high density chips
None of the above
Virtually all contemporary computer designs are based on concepts developed by __________ at the Institute for Advanced Studies, Princeton
John Maulchy
John von Neumann
Herman Hollerith
John Eckert
The von Neumann architecture is based on which concept?
data and instructions are stored in a single read-write memory
the contents of this memory are addressable by location
execution occurs in a sequential fashion
all of the above
A sequence of codes or instructions is called __________.
software
memory
an interconnect
a register
The processing required for a single instruction is called a(n) __________ cycle.
execute
fetch
instruction
packet
A(n) _________ is generated by a failure such as power failure or memory parity error.
I/O interrupt
hardware failure interrupt
timer interrupt
program interrupt
A(n) _________ is generated by some condition that occurs as a result of an instruction execution.
timer interrupt
I/O interrupt
program interrupt
hardware failure interrupt
The interconnection structure must support which transfer?
memory to processor
processor to memory
I/O to or from memory
all of the above
A bus that connects major computer components (processor, memory, I/O) is called a __________.
system bus
address bus
data bus
control bus
The __________ are used to designate the source or destination of the data on the data bus.
system lines
data lines
control lines
address lines
The data lines provide a path for moving data among system modules and are collectively called the _________.
control bus
address bus
data bus
system bus
The internal components of the processor are connected by________
Process intra-connectivity circuitry
Processor bus
Memory bus
Rambus
A __________ is the high-level set of rules for exchanging packets of data between devices.
bus
protocol
packet
QPI
Each data path consists of a pair of wires (referred to as a __________) that transmits data one bit at a time.
lane
path
line
bus
The device which is used to connect a peripheral to a bus is called _____
Control Register
Interface
Communication Protocol
None of the above
The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the link layer.
transaction layer
root layer
configuration layer
transport layer
The TL supports which of the following address spaces?
memory
I/O
message
all of the above
The QPI _________ layer is used to determine the course that a packet will traverse across the available system interconnects.
link
protocol
routing
physical
Which of the following registers connects to the memory through the address bus?
I/O AR
I/O BR
MAR
MBR
The time required to fetch an instruction from memory and execute it is called ........
Fetch Cycle
Execution Cycle
Load Cycle
Instruction Cycle
The CPU of a computer takes instructions from memory and executes them. This process is called _____
Load
Time Sequence
Execution
Fetch-Execute Cycle
In the process of executing a program, which of the following are initialized first?
MAR
MBR
IR
PC
The decoded instruction is stored in _____
IR
PC
Registers
MDR
The basic structure of instruction has ........
Operand and Opcode
Decoder and Accumulator
Sequence register and Decoder
None of the others
Interrupts can be generated to response to ........
Input/ Output activities
Detected program errors such as arithmetic overflow or division by zero
Detected hardware faults
All of the above
Which of the following is used to overcome the difference in data transfer rates of different devices?
Speed enhancing circuitry
Buffer registers
Multiple buses
Bridge circuits
Which types of transfers are supported by a computer's interconnection structure?
Memory to or from processor, I/O to or from processor, I/O to or from memory
I/O to or from processor, I/O to I/O, memory to or from processor
Memory to memory, memory to or from processor, I/O to or from processor
None of the others
The width of the address bus determines ........
The overall performance of the system
The number of bits can be transferred at a time
The maximum possible memory capacity of the system
None of the above
The key advantage of multi-bus organizations is ........
Reduction in the number of cycles for execution
Increase in size of the registers
Better connectivity
None of the others
To connect peripheral devices which require a direct connection with the processor we use ........
SCSI bus
PCI bus
ISA bus
Controllers
How much memory access would be needed to transfer a 64-bit instruction from memory to the CPU if the CPU uses 8-bit data and 32-bit address?
2
4
6
8
With the given figure, which of the following statements is true?
For a write operation, the processor puts the data on the data lines at the start of the second cycle
For a read operation, the processor issues a read command at the start of the second cycle
The processor places a memory address on the address lines during the first clock cycle
All of the above
With the given figure, which of the following statements is false?
The memory decodes the address and responds by placing the data on the data line
The memory module asserts the acknowledged line to signal the processor that the data are available
The processor places address on the address line at the same time that it issues a read command
None of the above
__________ refers to whether memory is internal or external to the computer.
Location
Access
Hierarchy
Tag
What is the high speed memory between the main memory and the CPU called?
Register Memory
Cache Memory
Storage Memory
Virtual Memory
The cache bridges the speed gap between ... and ...
RAM and ROM
RAM and Secondary memory
Processor and RAM
None of the above
Which of the following storages may have an associative access method?
Main memory
Disks
Virtual Memory
Cache
Cache Memory refers to:
A cheap memory that can be plugged into the motherboard to expand main memory
A fast memory that is used to store recently accessed data
A reserved portion of main memory is used to save important data
A special area of memory on the chip that is used to save frequently uses constant
The reason for the implementation of the cache memory is ________
To increase the internal memory of the system
The difference in speeds of operation of the processor and memory
To reduce the memory access and cycle time
All of the above
The effectiveness of the cache memory is based on the property of ______
Locality of reference
Memory localization
Memory size
None of the above
The temporal aspect of the locality of reference means_____
That the recently executed instruction will be executed soon
That the recently executed instruction is temporarily not referenced
That the recently executed instruction will be executed soon again
None of the above
The spatial aspect of the locality of reference means______
That the recently executed instruction is executed again next
That the recently executed will be executed again
That the recently executed instruction will be executed later time
That the instruction in close proximity of the instruction executed will be executed in future
Internal memory capacity is typically expressed in terms of _________.
hertz
nano
bytes
LOR
For internal memory, the __________ is equal to the number of electrical lines into and out of the memory module.
access time
unit of transfer
capacity
memory ratio
In the context of memory hierarchy which statement is correct?
Greater memory capacity, faster access time
Greater memory capacity, greater cost per pit
Faster access time, greater cost per pit
Faster access time, lower cost per pit
"Memory is organized into records and access must be made in a specific linear sequence" is a description of __________.
sequential access
direct access
random access
associative
Individual blocks or records have a unique address based on physical location with __________.
associative
physical access
direct access
sequential access
For random-access memory, __________ is the time it takes to perform a read or write operation, that is the time from the instant that an address is presented to the memory to the instant that data have been stored or made available for use.
memory cycle time
direct access
transfer rate
access time
The transfer between CPU and Cache is ________
Block transfer
Word transfer
Set transfer
Associative transfer
The transfer between main memory and disk is _________
Block transfer
Word transfer
Page transfer
Associative transfer
The ________ consists of the access time plus any additional time required before a second access can commence.
latency
memory cycle time
direct access
transfer rate
__________is the rate at which data can be transferred into or out of a memory unit. For random access memory, it is equal to 1/(cycle time)
latency
memory cycle time
direct access
transfer rate
The algorithm to remove and place new contents into the cache is called____
Replacement algorithm
Renewal algorithm
Update
None of the above
A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk is referred to as a _________.
disk cache
latency
virtual address
miss
A line includes a _________ that identifies which particular block is currently being stored.
cache
hit
tag
locality
Whenever the data is found in the cache memory it is called as _________
hit
miss
error
found
__________ is the simplest mapping technique and maps each block of main memory into only one possible cache line.
Direct mapping
Associative mapping
Set associative mapping
None of the above
_______ overcomes the disadvantage of direct mapping by permitting each main memory block to be loaded into any line of the cache.
Direct mapping
Associative mapping
Set associative mapping
None of the above
_____ is a compromise that exhibits the strengths of both the direct and associative approaches while reducing their disadvantages.
Direct mapping
Associative mapping
Set associative mapping
None of the above
When using the __________ technique all write operations made to main memory are made to the cache as well.
write back
LRU
write through
unified cache
In ______ mapping, the data can be mapped anywhere in the Cache Memory.
Associative
Direct
Set Associative
Indirect
______ updates are made only in the cache. Portions of main memory are invalid and hence accesses by I/O modules can be allowed only through the cache
write back
LRU
write through
unified cache
The key advantage of the __________ design is that it eliminates contention for the cache between the instruction fetch/decode unit and the execution unit.
logical cache
split cache
unified cache
physical cache
The Pentium 4 _________ component executes micro-operations, fetching the required data from the L1 data cache and temporarily storing results in registers.
fetch/decode unit
out-of-order execution logic
execution unit
memory subsystem
In reference to access time to a two-level memory, a _________ occurs if an accessed word is not found in the faster memory.
miss
hit
line
tag
A logical cache stores data using __________.
physical addresses
virtual addresses
random addresses
none of the above
The virtual memory bridges the size and speed gap between ... and ...
RAM and ROM
Processor and RAM
RAM and Secondary Memory
None of the above
The processor accesses the cache directly without going through the MMU and a physical cache stores data using main memory _________
physical addresses
virtual addresses
random addresses
none of the above
To get the physical address from the logical address generated by CPU we use ______
MAR
MMU
Overlays
TLB
Which properties do all semiconductor memory cells share?
they exhibit two stable states which can be used to represent binary 1 and 0
they are capable of being written into to set the state
they are capable of being read to sense the state
all of the above
One distinguishing characteristic of memory that is designated as _________ is that it is possible to both to read data from the memory and to write new data into the memory easily and rapidly.
RAM
ROM
EPROM
EEPROM
With RAM, which of the following statements is true:
It is not volatile
DRAM is not from flip-flops
SRAM is made from capacitors
A place to store information that the computer is processing
What are the key properties of the semiconductor memory cell?
They exhibit two states, which can be represented by 0 or 1
They are capable of being written into to set the state
They can be read to sense the state
All of the above
With RAM, which of the following statements is false:
DRAM is made from flip-flops
DRAM is made from capacitors
SRAM is made from flip-flops
SRAM does not need to be refreshed
RAM is called DRAM (Dynamic RAM) when ...
It is always moving around data
It requires periodic refreshing
It can do several things simultaneously
None of the above
The standard SRAM chips are costly as ...
They use highly advanced micro-electronic devices.
They house 6 transistor per chip.
They require specially designed PCB’s.
None of the others
The computer input/output system does not include simultaneously the following devices:
ROM, RAM, registers
Monitor, RAM, printer
CPU, mouse, photo scanner
Magnetic discs, speakers, CD-ROM
Which of the following memory types are nonvolatile?
erasable PROM
programmable ROM
flash memory
all of the above
In a _________, binary values are stored using traditional flip-flop logic-gate configurations and it is used for cache memory
ROM
SRAM
DRAM
RAM
With SRAM memory chips 16Kx8bit, which of the following statements is wrong:
There are 14 address lines
There are 8 data lines
The address lines are: A0 – A13
The address lines are: A0 – A14
With the SRAM memory 64K x 4-bit, which of the following statements is true:
The address lines are: A0 -> A15
The address lines are: D0 -> D15
The data lines are: A0 -> A3
The data lines are: D0 -> D8
SDRAM stands for ______
Static dynamic random access memory
System dynamic random access memory
Synchronous dynamic random access memory
Syndrome dynamic random access memory
A __________ contains a permanent pattern of data that cannot be changed, is nonvolatile, and cannot have new data written into it.
RAM
SRAM
ROM
flash memory
ROMs are used to _______
Record large size data, unchanged over time
Record small size data, updated regularly
Record the system subroutine
Contain the computer control program
When only a small number of ROMs with a particular memory content are needed and less expensive alternative is _____.
RAM
SRAM
PROM
flash memory
A________ requires periodic change refreshing to maintain data storage and is used for main memory.
ROM
SRAM
DRAM
RAM
Part of the operating system is usually stored in ROM so that it can be used to boot up the computer. ROM is used rather than RAM because:
ROM chips are faster than RAM
ROM chips are not volatile
ROM chips are cheaper than RAM chips
None of the above
