Font size
WorksheetsQuiz on ARM Cortex-M4 Microcontroller
Total questions: 25
Worksheet time: 23mins
What is ARM?
What is Cortex?
What is M4?
What is an ARM Microcontroller?
What are the modes based on instruction set states in ARM architecture?
ARM Mode
Thumb Mode
Thumb-2
What are the seven modes during execution of an ARM processor?
User mode
FIQ
Abort
Supervisor
IRQ
What is the purpose of the Stack Pointer (SP)?
To store the return address of subroutines
To hold the address of the next instruction
To manage memory as a Last-In-First-Out (LIFO) buffer
To store the current status of the processor
What does the Current Program Status Register (CPSR) contain?
The address of the next instruction
The current status of the processor
The return address of the last subroutine
The stack pointer value
What happens during a reset in ARM Cortex-M4?
The processor fetches the initial SP value
The processor fetches the Reset Handler address
Execution begins at the Reset Handler
All of the above
What is the function of the Link Register (LR)?
To store the current status of the processor
To hold the return address of subroutines
To manage the stack memory
To store the address of the next instruction
What is the significance of the Negative Flag in CPSR?
Indicates whether the result is negative
Indicates whether the result is zero
Represents a carry out from the MSB
Represents a signed overflow condition
What is the instruction size in ARM state?
16 bits
32 bits
8 bits
64 bits
What is the purpose of the Saved Program Status Register (SPSR)?
To preserve the value of CPSR during exceptions
To store the return address of subroutines
To manage the stack memory
To hold the address of the next instruction
What does the Carry Flag represent?
Indicates whether the result is negative
Indicates whether the result is zero
Represents a carry out from the MSB
Represents a signed overflow condition
What is the function of the Barrel Shifter?
To perform arithmetic operations
To pre-shift and rotate operands
To manage memory access
To store the return address of subroutines
What is the main characteristic of Load Store Architecture?
Memory access differs from logical and arithmetic operations
All instructions are 32 bits
It uses a single register for all operations
It allows direct memory access for all operations
What is the role of the Program Counter (PC) in ARM architecture?
To preserve the value of CPSR during exceptions
To manage the stack memory
To hold the address of the next instruction to be executed
To store the return address of subroutines
What does the Overflow Flag indicate in the CPSR?
Represents a signed overflow condition
Represents a carry out from the MSB
Indicates whether the result is zero
Indicates whether the result is negative
What is the purpose of the Link Register (LR) during function calls?
To store the address of the next instruction
To hold the return address of the calling function
To store the current status of the processor
To manage the stack memory
What is the purpose of the Data Processing Instructions in ARM architecture?
To perform logical and arithmetic operations on data
To manage memory access
To control the flow of execution
To handle exceptions
What is the function of the Memory Management Unit (MMU) in ARM systems?
To store the return address of subroutines
To manage the stack memory
To translate virtual addresses to physical addresses
To perform arithmetic operations
What does the Instruction Fetch stage do in the ARM pipeline?
Fetches the next instruction from memory
Decodes the fetched instruction
Executes the instruction
Writes back the result to memory
What is the function of the Program Status Register (PSR) in ARM architecture?
To store the return address of subroutines
To manage memory access
To indicate the current state of the processor
To hold the address of the next instruction
What does the Instruction Decode stage do in the ARM pipeline?
Decodes the fetched instruction
Fetches the next instruction from memory
Writes back the result to memory
Executes the instruction
What is the purpose of the Control Register in ARM systems?
To hold the address of the next instruction
To preserve the value of CPSR during exceptions
To store the current status of the processor
To manage the execution of instructions
