WorksheetsFlip-Flop Quiz
Total questions: 112
Worksheet time: 2hrs 52mins
Which flip-flop is also known as a bistable multivibrator?
SR Flip-Flop
D Flip-Flop
JK Flip-Flop
All of the above
What does the "D" in D flip-flop stand for?
Data
Delay
Dual
Dynamic
In an SR flip-flop, what happens when both S and R inputs are 1?
Set
Reset
Toggle
Invalid state
Which flip-flop eliminates the invalid condition of the SR flip-flop?
JK Flip-Flop
D Flip-Flop
T Flip-Flop
Master-Slave Flip-Flop
What is the output of a T flip-flop when T=1 and clock pulses are applied?
No change
Reset
Set
Toggle
How many stable states does a flip-flop have?
1
2
3
4
A JK flip-flop can be made to work as a T flip-flop by:
Connecting J = 1 and K = 0
Connecting J = 0 and K = 1
Connecting J = K = T
Shorting Q and not-Q
Which of the following is not a type of flip-flop?
SR
D
TP
JK
Flip-flops are primarily used for:
Addition
Multiplication
Counting and storage
Signal amplification
A master-slave JK flip-flop avoids race conditions by:
Using high-speed clock
Using two JK flip-flops in series
Feeding back outputs
Using two different input voltages
What does "SR" stand for in SR Flip-Flop?
Set and Reset
Shift and Register
Serial and Random
Store and Read
What is the output of an SR flip-flop when S = 0 and R = 1?
Q = 1, Q' = 0
Q = 0, Q' = 1
Q = Qprev
Invalid state
What is the condition called when both S = 1 and R = 1 in an SR flip-flop?
Set
Reset
Hold
Invalid
In an SR flip-flop, what happens when S = 0 and R = 0?
Set
Reset
Toggle
No change (Hold state)
Which logic gate combination is used in a basic SR flip-flop?
AND gates
NAND gates
NOR gates
XOR gates
What is the output of SR flip-flop when S = 1 and R = 0?
Q = 1, Q' = 0
Q = 0, Q' = 1
Q = Qprev
Invalid state
What kind of flip-flop is an SR flip-flop?
Monostable
Astable
Bistable
Tristable
What happens if both inputs of an SR latch using NAND gates are high (S = R = 1)?
Invalid state
Set state
Reset state
No change
In a clocked SR flip-flop, the output changes:
Whenever inputs change
On every negative clock edge
On a triggering clock edge
Continuously without clock
Which of the following is a major drawback of the basic SR flip-flop?
Slow response
Power loss
Invalid condition at S = R = 1
Large size
What does "JK" stand for in JK flip-flop?
Just Kill
Jack Kilby
John Kenneth
Nothing specific
What is the output of a JK flip-flop when J = 1, K = 0?
Set (Q = 1)
Reset (Q = 0)
Toggle
No change
What happens when J = 1 and K = 1 in a JK flip-flop?
No change
Set
Reset
Toggle
What is the major advantage of JK flip-flop over SR flip-flop?
Less power usage
No clock required
Elimination of invalid condition
Faster operation
When J = 0 and K = 1, the output of a JK flip-flop will be:
Toggle
Set
Reset
Hold
What is the output when J = 0, K = 0?
Toggle
No change
Reset
Set
The race-around condition occurs in JK flip-flop when:
Clock is high and J = K = 1
J = 1 and K = 0
Clock is low
J = 0 and K = 1
How is race-around condition avoided in JK flip-flops?
Using a NAND gate
By reducing voltage
Using Master-Slave configuration
Increasing delay
Which of the following flip-flops is formed when J and K inputs are tied together?
D flip-flop
SR flip-flop
T flip-flop
None of the above
Which logic gates are typically used to construct a JK flip-flop?
NOR
XOR
NAND
AND-OR
What does the "D" in D Flip-Flop stand for?
Delay
Data
Dual
Direction
How many inputs does a basic D flip-flop have (excluding clock)?
1
2
3
4
What is the output of a D flip-flop when D = 1 and a clock edge is applied?
Q = 0
Q = 1
Q = D'
Q toggles
What happens to the output of a D flip-flop when D = 0 and a rising clock edge occurs?
Q = 1
Q = 0
Q toggles
Q holds previous state
What type of triggering is most commonly used in D flip-flops?
Positive edge-triggered
Negative edge-triggered
Level-triggered
Pulse-triggered
Which flip-flop is considered the simplest and is often used for data storage?
JK flip-flop
T flip-flop
D flip-flop
SR flip-flop
What is the function of a D flip-flop?
Toggle the output
Store previous output
Eliminate race conditions
Transfer input to output on clock edge
If a D flip-flop has an input D = 1 and is triggered by a clock, what will Q be after the clock pulse?
1
0
Unchanged
Invalid
The D flip-flop can be used to implement which of the following?
Buffer
Register
Latch
All of the above
What does the "T" in T flip-flop stand for?
Time
Trigger
Toggle
Transfer
What is the output of a T flip-flop when T = 0 and a clock edge occurs?
Output toggles
Output resets
Output holds previous state
Output sets to 1
What happens when T = 1 and a clock pulse is applied to a T flip-flop?
Output resets
Output sets
Output toggles
Output remains unchanged
A T flip-flop can be constructed using which of the following flip-flops?
SR flip-flop
D flip-flop
JK flip-flop
None of these
T flip-flops are primarily used in:
Adders
Registers
Frequency dividers and counters
Code converters
T flip-flops are primarily used in:
Adders
Registers
Frequency dividers and counters
Code converters
What is the output when T = 1 for three consecutive clock pulses, starting with Q = 0?
0 → 1 → 0 → 1
0 → 1 → 1 → 0
0 → 0 → 1 → 1
0 → 1 → 1 → 1
The characteristic equation of a T flip-flop is:
Q(next) = T
Q(next) = T'
Q(next) = Q
Q(next) = T ⊕ Q
When used in a binary counter, each T flip-flop divides the frequency by:
1
2
4
10
A T flip-flop differs from a JK flip-flop in that:
It has two inputs
It eliminates toggling
It has only one input
It does not respond to clock
What does "edge triggering" refer to in digital circuits?
Change in voltage level
Change in logic state
Response to a clock pulse edge
Response to input value
In a positive edge-triggered flip-flop, the output changes:
When clock is high
On the falling edge of the clock
On the rising edge of the clock
When data input is high
Which symbol indicates a negative edge-triggered flip-flop?
↑
↓
#
*
What is the main advantage of edge triggering over level triggering?
More sensitive to noise
Reduces race conditions
Works without a clock
Increases circuit size
Which flip-flop operates on both rising and falling clock edges?
D flip-flop
T flip-flop
JK flip-flop
Dual-edge triggered flip-flop
In edge triggering, which of the following is true?
Flip-flop samples input throughout the clock pulse
Flip-flop ignores the clock
Flip-flop responds only at the moment of clock transition
Output follows input continuously
Which circuit component is often used to implement edge triggering in flip-flops?
Resistor
Capacitor
Differentiator circuit
XOR gate
Which edge triggering allows capturing data when the clock changes from 1 to 0?
Positive edge triggering
Negative edge triggering
Level triggering
Dual edge triggering
Which of the following statements is false about edge triggering?
It improves timing accuracy
It ensures synchronous operation
It increases metastability
It prevents unwanted state changes
Flip-flops are primarily used for:
Data transmission
Arithmetic operations
Data storage and sequencing
Analog signal processing
Which of the following is a common application of a T flip-flop?
Data Latching
Edge Detection
Frequency Division
Multiplexing
A group of flip-flops used to store multiple bits is called a:
Decoder
Register
Multiplexer
Counter
Which flip-flop is best suited for eliminating glitches and ensuring clean data storage?
T flip-flop
JK flip-flop
SR flip-flop
D flip-flop
Flip-flops are essential components in:
Analog amplifiers
Digital clocks and timers
Low-pass filters
Voltage regulators
Which flip-flop is typically used in binary counters?
D flip-flop
SR flip-flop
JK or T flip-flop
Clock generator
A shift register is constructed using:
Multiplexers
Only JK flip-flops
A series of flip-flops
Logic gates only
In digital systems, flip-flops are used to design:
ALUs
Memory units
Control units and sequential circuits
Signal conditioners
Which of the following cannot be designed using flip-flops?
Counter
Shift register
ROM
Finite State Machine
Flip-flops can act as:
Digital timers
Static memory cells
Pulse-width modulators
All of the above
What is a register in digital electronics?
A memory address decoder
A group of logic gates
A small amount of storage using flip-flops
A type of microprocessor
How many bits can be stored in a 4-bit register?
2
8
16
4
What is the main function of a shift register?
Add binary numbers
Convert analog to digital
Shift data left or right
Store decimal numbers
A register that shifts data in one direction only is called:
Bidirectional shift register
Left-right shift register
Unidirectional shift register
Static shift register
How many flip-flops are required to construct an 8-bit register?
2
4
8
16
Which of the following is not a type of register?
Serial-in Serial-out (SISO)
Serial-in Parallel-out (SIPO)
Parallel-in Serial-out (PISO)
Digital-in Analog-out (DIAO)
Which register is used to hold the address of the next instruction in a CPU?
Data Register
Program Counter
Instruction Register
Accumulator
Which type of register loads all bits simultaneously?
Serial register
Parallel register
FIFO register
Accumulator
A register used to temporarily store data from the memory is called:
Instruction Register
Memory Data Register (MDR)
Program Counter
Status Register
What is the main advantage of using registers in a processor?
Cost reduction
Fast data access
Increased memory
Signal amplification
What is a shift register?
A circuit that adds binary numbers
A memory unit
A group of flip-flops used to store and shift data
A type of multiplexer
How many flip-flops are needed in a 4-bit shift register?
1
2
3
4
What does a Serial-In Serial-Out (SISO) register do?
Loads and outputs all bits at once
Shifts data both ways
Loads and outputs one bit at a time
Stores analog data
Which shift register allows data to be entered serially and read out in parallel?
SISO
PISO
SIPO
PIPO
What is the output of a 4-bit register initially loaded with 1011, after one right shift with 0 inserted from the left?
0101
1101
0010
0101
What is the function of a serial-to-parallel converter?
Converts analog data to digital
Converts binary to decimal
Converts serial data input into parallel output
Converts voltage levels
Which type of shift register is used for serial-to-parallel conversion?
SISO
SIPO
PISO
PIPO
How many clock pulses are needed to convert 4-bit serial data to parallel?
1
2
3
4
What type of flip-flop is commonly used in shift registers for data conversion?
T flip-flop
JK flip-flop
SR flip-flop
D flip-flop
Which of the following devices uses serial-to-parallel conversion?
Parallel printers
Analog-to-digital converters
CRT monitors
Serial ports in computers
In serial-to-parallel conversion, the input is:
Entered all at once
Shifted into the register one bit at a time
Converted using logic gates
Stored in cache memory
Which parameter determines how fast a serial-to-parallel converter can operate?
Number of bits
Voltage
Clock frequency
Number of output lines
Serial-to-parallel converters are commonly used in:
RAM
UART communication
ROM
ALU
Which signal controls the data shifting in a serial-to-parallel converter?
Enable
Reset
Clock
Vcc
What happens after the last bit is received in a serial-to-parallel converter?
Data is cleared
Data is printed
Data is available in parallel output lines
Data is shifted again
What is the main function of a parallel-to-serial converter?
Converts decimal to binary
Converts data from analog to digital
Converts parallel data inputs into serial output
Stores data temporarily
Which shift register is used in parallel-to-serial conversion?
SIPO
SISO
PISO
PIPO
In a 4-bit parallel-to-serial converter, how many clock pulses are required to transmit the data?
1
2
4
8
Which of the following devices uses parallel-to-serial conversion?
Digital thermometer
UART (Transmitter)
LCD
Printer
What controls the shifting of bits in a parallel-to-serial converter?
Vcc
Clock
Reset
Enable
In parallel-to-serial conversion, when is the data loaded into the shift register?
After each bit is shifted
Before shifting begins
Continuously during operation
Only when reset is high
Which flip-flop is typically used in the design of shift registers for data conversion?
JK
D
T
SR
Which of the following is not an application of a parallel-to-serial converter?
Serial communication
UART transmission
Data compression
Interfacing microprocessors with serial buses
A parallel-to-serial converter is useful when:
Data needs to be read simultaneously
Data is transmitted over a single communication line
Multiple devices write data at once
Analog data needs to be converted
What happens after all bits are shifted out in a PISO register?
Register holds previous bits
Register clears automatically
Output repeats the same sequence
New data must be loaded
What is a counter in digital electronics?
A device that multiplies numbers
A sequential circuit that counts clock pulses
A logic gate
A type of decoder
Which flip-flop is most commonly used in counter design?
SR flip-flop
D flip-flop
JK flip-flop
T flip-flop
A 3-bit binary counter can count from:
0 to 3
0 to 7
0 to 8
1 to 7
A mod-10 counter has how many distinct states?
2
4
8
10
Which of the following is a synchronous counter?
Ripple counter
Johnson counter
Ring counter
All flip-flops triggered by the same clock
Which of these is an asynchronous counter?
Binary counter with single clock input to first flip-flop
All flip-flops triggered together
Synchronous up-down counter
Counter with enable logic
The frequency of the output of the last flip-flop in a 4-bit ripple counter is:
Same as the clock frequency
Half of the clock frequency
One-eighth of the clock frequency
One-sixteenth of the clock frequency
What is the main disadvantage of asynchronous counters?
Complexity
High power usage
Propagation delay
Low frequency support
What is an asynchronous up counter?
A counter that counts downward asynchronously
A counter where all flip-flops are triggered by the same clock
A counter where only the first flip-flop is clocked, and others are triggered by previous outputs
A counter with no flip-flops
