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pc quiz

Total questions: 106

Worksheet time: 35mins

Name
Class
Date
1.

Parallel programming primarily aims to:

a)

Reduce compiler time

b)

Increase execution speed

c)

Reduce machine cost

d)

Increase program length

2.

SIMD stands for:

a)

Single Instruction Multiple Data

b)

Simple Instruction Multiple Data

c)

Single Instruction Multiple Device

d)

Synchronous Instruction Multiple Data

3.

MIMD systems allow:

a)

One instruction stream only

b)

Multiple instruction streams

c)

No parallelism

d)

Vector operations only

4.

Which of the following is a shared-memory model?

a)

MPI

b)

OpenMP

c)

CUDA

d)

None

5.

A cluster of networked computers usually follows:

a)

Distributed-memory model

b)

Shared-memory model

c)

SIMD

d)

SISD

6.

Which interconnection network has constant diameter?

a)

Mesh

b)

Torus

c)

Hypercube

d)

Bus

7.

Cache coherence is mainly an issue in:

a)

Distributed memory

b)

Shared memory

c)

SIMD systems

d)

Interconnection networks

8.

MESI protocol is used for:

a)

GPU programming

b)

Cache coherence

c)

Scheduling

d)

MPI communication

9.

A single bus interconnection suffers from:

a)

Low latency

b)

High scalability

c)

Contention

d)

Multithread safety

10.

In distributed memory, communication happens via:

a)

Shared cache

b)

Message passing

c)

Coherence protocol

d)

DMA operations only

11.

Coordinating threads usually involves:

a)

Locks

b)

Signals

c)

Atomic operations

d)

All the above

12.

Flynn’s taxonomy includes:

a)

SISD, SIMD, MISD, MIMD

b)

SISD, MIID, SIFD, MIUD

c)

SISD only

d)

None

13.

A GPU is an example of:

a)

SIMD

b)

MIMD

c)

SISD

d)

MISD

14.

NUMA stands for:

a)

Non-Unique Memory Architecture

b)

Non-Uniform Memory Access

c)

Non-User Memory Allocation

d)

None

15.

Which network topology is easiest to scale?

a)

Bus

b)

Ring

c)

Hypercube

d)

Mesh

16.

Threads in shared memory communicate using:

a)

Signals

b)

Shared variables

c)

Registers

d)

Disk

17.

Latency refers to:

a)

Time per instruction

b)

Delay in data transfer

c)

Amount of memory

d)

Speedup

18.

Shared memory programming is easier than distributed memory because:

a)

No communication is needed

b)

Memory is implicitly shared

c)

Synchronization is automatic

d)

None

19.

Distributed memory programs scale better because:

a)

Cache is larger

b)

Communication is explicit

c)

Memory increases with nodes

d)

No bus contention

20.

A race condition occurs when:

a)

Two threads access same data without synchronization

b)

Only one thread runs

c)

System is overloaded

d)

GPU stalls

21.

Speedup is defined as:

a)

Serial time / Parallel time

b)

Parallel time / Serial time

c)

CPU time / GPU time

d)

None

22.

Amdahl’s law limits:

a)

Speed

b)

Scalability

c)

Memory

d)

Instruction count

23.

If 50% of a program is parallelizable, max speedup is:

a)

1

b)

2

c)

10

d)

Infinite

24.

GPUs use which parallelism?

a)

Coarse-grained

b)

Fine-grained

c)

Temporal

d)

Loop unrolling

25.

GPU performance depends mainly on:

a)

Memory bandwidth

b)

Clock speed

c)

Number of CUDA cores

d)

All the above

26.

MIMD programs are harder than SIMD due to:

a)

Multiple control flows

b)

Less memory

c)

No parallelism

d)

Expensive hardware

27.

Efficiency is:

a)

Speedup / Processors

b)

Processors / Speedup

c)

Parallel time / Serial time

d)

None

28.

Which is a hybrid system?

a)

CPU + GPU

b)

Two CPUs

c)

Multi-core CPU only

d)

FPGA

29.

Roofline model evaluates:

a)

Timing

b)

Power

c)

Performance

d)

Heat

30.

GPU memory hierarchy includes:

a)

Registers → Shared → Global

b)

Registers → L1 → Disk

c)

Only global

d)

None

31.

A warp contains:

a)

8 threads

b)

16 threads

c)

32 threads

d)

64 threads

32.

GPU speed depends greatly on:

a)

Arithmetic intensity

b)

Disk speed

c)

File I/O

d)

OS version

33.

Strong scaling means:

a)

Increase problem size

b)

Keep problem size constant

c)

Decrease processor count

d)

None

34.

Weak scaling means:

a)

Increase input with processors

b)

Keep input constant

c)

No parallelism

d)

Amdahl’s law

35.

PCIe bandwidth affects:

a)

CPU speed

b)

GPU data transfer

c)

Cache miss rate

d)

None

36.

Timing a parallel program requires:

a)

Wall clock

b)

CPU clock

c)

Both

d)

None

37.

A GPU kernel launches:

a)

Grid of blocks

b)

Blocks only

c)

Threads only

d)

None

38.

Divergence occurs when:

a)

Threads follow different branches

b)

GPU stalls

c)

CPU overheats

d)

Memory allocates wrong

39.

The sequential part of a program:

a)

Limits speedup

b)

Improves speed

c)

Increases memory

d)

None

40.

Efficiency reduces when:

a)

Communication increases

b)

Processors increase

c)

Synchronization overhead increases

d)

All the above

41.

MPI stands for:

a)

Multi Processing Interface

b)

Message Passing Interface

c)

Multi Processor Interconnect

d)

None

42.

MPI_Init must be called:

a)

Anywhere

b)

Before any other MPI function

c)

After MPI_Finalize

d)

Only by master process

43.

MPI_COMM_WORLD refers to:

a)

All processes

b)

Only root process

c)

GPU group

d)

Thread group

44.

Rank in MPI identifies:

a)

A thread

b)

A process

c)

A GPU core

d)

Cache

45.

MPI_Send and MPI_Recv implement:

a)

Point-to-point communication

b)

Collective communication

c)

I/O

d)

Datatype creation

46.

Broadcast is done using:

a)

MPI_Bcast

b)

MPI_Share

c)

MPI_Split

d)

MPI_Signal

47.

MPI_Reduce performs:

a)

File I/O

b)

Collective reduction

c)

Data type creation

d)

Process splitting

48.

MPI derived datatypes allow:

a)

Representing struct-like data

b)

Representing only ints

c)

GPU memory use

d)

Cache coherence

49.

MPI is best used for:

a)

Shared-memory

b)

Distributed-memory

c)

GPU programming

d)

Virtual memory

50.

Deadlock can occur when:

a)

Blocking send/receive mismatches

b)

GPU waits

c)

Cache misses

d)

Thread stalls

51.

Non-blocking calls are created using:

a)

MPI_Send

b)

MPI_Isend / MPI_Irecv

c)

MPI_Reduce

d)

None

52.

Trap rule in MPI requires:

a)

Partitioning intervals

b)

Synchronization

c)

Reduction of partial sums

d)

All the above

53.

Collective communication means:

a)

All processes participate

b)

Only rank 0 participates

c)

Only threads participate

d)

None

54.

MPI_Gather collects data from:

a)

All → One

b)

One → All

c)

Many → Many

d)

None

55.

MPI_Scatter distributes data from:

a)

One → All

b)

All → One

c)

Root → Rank 0

d)

None

56.

MPI_Finalize must be called:

a)

First

b)

Last

c)

Only by root

d)

Only in serial code

57.

Performance of MPI degrades mainly due to:

a)

High communication

b)

Cache misses

c)

GPU stalls

d)

ILP

58.

MPI_Cart_create creates a:

a)

Thread

b)

Cartesian communicator

c)

GPU kernel

d)

None

59.

MPI_File_read is used for:

a)

Parallel I/O

b)

Cache coherence

c)

GPU I/O

d)

None

60.

Parallel sorting in MPI uses:

a)

Partition → local sort → merge

b)

Single-thread quicksort

c)

Cache blocking

d)

None

61.

OpenMP supports:

a)

Shared-memory parallelism

b)

Distributed-memory

c)

GPU

d)

Cloud

62.

OpenMP directives start with:

a)

//OMP

b)

#pragma omp

c)

omp()

d)

@omp

63.

Creating threads uses:

a)

omp parallel

b)

omp create

c)

mpi_spawn

d)

gpu.start

64.

Reduction clause performs:

a)

Parallel loop splitting

b)

Combining partial results

c)

Thread creation

d)

None

65.

Loop scheduling in OpenMP includes:

a)

static

b)

dynamic

c)

guided

d)

all the above

66.

False sharing occurs when:

a)

Threads modify different variables in same cache line

b)

Lock missing

c)

Only one thread runs

d)

GPU divergence

67.

Thread-safe functions:

a)

Can be used by multiple threads safely

b)

Need no locks

c)

Are slower always

d)

Are GPU-only

68.

Tasking is used for:

a)

Recursive parallelism

b)

Static loops only

c)

Single-thread work

d)

None

69.

private clause means:

a)

Variable shared

b)

New copy for each thread

c)

Read-only

d)

GPU-only

70.

critical section ensures:

a)

Atomic execution

b)

GPU synchronization

c)

Compiler optimization

d)

All threads skip it

71.

Which clause avoids race conditions?

a)

private

b)

shared

c)

reduction

d)

collapse

72.

Producers-consumers require:

a)

Locks

b)

Condition variables

c)

Queues

d)

All

73.

The default variable scope is:

a)

private

b)

shared

c)

firstprivate

d)

threadprivate

74.

Loop-carried dependency prevents:

a)

Parallelization

b)

Memory allocation

c)

Synchronization

d)

Clock rate

75.

omp_get_thread_num() returns:

a)

Process ID

b)

Thread ID

c)

Warp ID

d)

None

76.

Barrier is used to:

a)

Synchronize threads

b)

Allocate memory

c)

Free locks

d)

Avoid false sharing

77.

OpenMP program begins execution on:

a)

All threads

b)

Single master thread

c)

GPU threads

d)

None

78.

nowait removes:

a)

Implicit barrier

b)

Race condition

c)

Scheduling

d)

SIMD loop

79.

In OpenMP, nested parallelism means:

a)

Parallel inside parallel

b)

Serial inside parallel

c)

Message passing

d)

GPU offloading

80.

Cache coherence impacts:

a)

Shared memory programs

b)

MPI

c)

CUDA

d)

None

81.

CUDA stands for:

a)

Compute Unified Device Architecture

b)

Common Unified Device API

c)

Computational Device Access

d)

None

82.

GPU kernels run on:

a)

Host

b)

Device

c)

CPU

d)

Cache

83.

CUDA threads are grouped into:

a)

Blocks

b)

Warps

c)

Grids

d)

All

84.

One warp contains:

a)

8

b)

16

c)

32

d)

64 threads

85.

Block size must not exceed:

a)

128

b)

256

c)

512

d)

1024 threads

86.

Global memory is:

a)

Slow but large

b)

Fast but small

c)

Register memory

d)

Cache memory

87.

Shared memory is:

a)

Fast on-chip memory

b)

Slow DRAM

c)

Registers

d)

Texture memory

88.

CUDA kernels are invoked using:

a)

<<>>

b)

{}

c)

()

d)

##

89.

cudaMemcpy is used for:

a)

CPU ↔ GPU data transfer

b)

GPU ↔ GPU

c)

Cache refill

d)

MPI

90.

Compute capability gives:

a)

GPU features

b)

Cache size

c)

Power usage

d)

PCIe speed

91.

Coalesced access improves:

a)

Latency

b)

Memory throughput

c)

Warp divergence

d)

PCIe speed

92.

Divergence occurs when:

a)

Threads in warp take different paths

b)

GPU overheats

c)

Kernel fails

d)

Memory insufficient

93.

Vector addition kernel requires:

a)

One thread per element

b)

One warp per element

c)

One block

d)

No grid

94.

Device functions are declared with:

a)

device

b)

kernel

c)

thread

d)

omp_device

95.

Kernel return values:

a)

Cannot directly return

b)

Can return like CPU

c)

Always return float

d)

Return warp id

96.

Stream processors are called:

a)

CUDA cores

b)

Threads

c)

SMs

d)

Registers

97.

SM stands for:

a)

Streaming Multiprocessor

b)

Shared Memory

c)

System Module

d)

None

98.

Occupancy refers to:

a)

Active warps per SM

b)

Cache usage

c)

Kernel size

d)

Register count

99.

Launching large blocks can reduce:

a)

Parallelism

b)

Performance

c)

Memory

d)

Bandwidth

100.

Using more than one warp per block helps:

a)

Hide latency

b)

Increase divergence

c)

Reduce cache

d)

Slow down

101.

A system with 4 processors executes a parallel loop. Each iteration takes 2 ms and there are 40 iterations. If the loop is perfectly parallelizable, total execution time is:

a)

20 ms

b)

40 ms

c)

10 ms

d)

80 ms

102.

A SIMD architecture processes 128 data elements per instruction. How many instructions are required to process 4096 elements?

a)

16

b)

32

c)

64

d)

128

103.

In a shared-memory system, two threads repeatedly write to different variables located in the same cache line. The performance drops. What phenomenon is this?

a)

Contention

b)

Cache miss

c)

False sharing

d)

Dirty eviction

104.

A 4×4 mesh network has a diameter of:

a)

2

b)

4

c)

6

d)

8

105.

A program takes 100 seconds serially. It has 80% parallel code. What is its maximum speedup using Amdahl’s law?

a)

2

b)

3

c)

4

d)

5

106.

If a parallel program achieves a speedup of 15 on 20 cores, its efficiency is:

a)

50%

b)

75%

c)

60%

d)

90%