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WorksheetsComputer Architecture Quiz
Total questions: 25
Worksheet time: 13mins
Which unit of a computer performs arithmetic and logical operations?
Control Unit
Memory Unit
ALU
Input Unit
Which register contains the address of the next instruction to be executed?
MAR
MDR
IR
PC
In little-endian format, the least significant byte is stored at:
Highest memory address
Lowest memory address
Random location
Cache memory
Overflow in 2’s complement addition occurs when:
Adding two numbers gives zero
Adding two positives gives negative
Adding two negatives gives positive
Both B and C
Which factor does NOT affect CPU performance?
Clock rate
CPI
Instruction count
Power supply
Which addressing mode uses a pointer to access operand?
Register
Direct
Indirect
Immediate
Parameter passing by reference means:
Passing value copy
Passing address
Passing constant
Passing register only
Which addressing mode is used in stack operations?
Direct
Immediate
Implicit
Indexed
DMA allows data transfer between:
CPU and I/O
Memory and I/O
CPU and memory
Cache and CPU
Vectored interrupt means:
Fixed ISR address
ISR address supplied by device
Software polling
No priority
DMA improves system performance by:
Increasing CPU load
Reducing CPU involvement
Slowing memory access
Increasing instruction count
Cache memory is placed between:
CPU and I/O
CPU and main memory
Main memory and disk
Disk and I/O
Which memory is volatile?
ROM
Flash
SRAM
Magnetic disk
Indexed addressing is mainly useful for:
Stack operations
Loop and array access
Subroutine return
Interrupt handling
Stack follows which principle?
FIFO
LIFO
Random
Priority
PUSH operation on stack causes the stack pointer to:
Increment
Decrement
Remain unchanged
Reset
Control signals are generated by:
ALU
Datapath
Control unit
Registers
ADD (R3), R1 instruction means:
R1 ← R1 + R3
R1 ← R1 + M[R3]
R3 ← R3 + R1
R1 ← R3
Instruction execution begins with:
Decode
Fetch
Execute
Write back
Datapath consists of:
Registers & ALU
Memory only
Control signals
Interrupt logic
Memory refresh is required for:
SRAM
ROM
DRAM
Cache
Hardwired control unit uses:
Microinstructions
Control memory
Fixed logic circuits
Software routines
Compared to single-bus organization, multiple-bus organization is:
Slower and cheaper
Faster but more complex
Slower but more reliable
Identical in performance
Static RAM cell uses:
Capacitor
Flip-flop
Diode
Transformer
DRAM stores data using:
Flip-flops
Capacitors
Registers
Magnetic fields
