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Page 1

Total questions: 92

Worksheet time: 46mins

Name
Class
Date
1.

According to the diagram, every instruction of a program has to operate on what?

a)

Data

b)

An I/O port

c)

A memory segment only

d)

Processor flags

2.

According to the diagram, what are addressing modes?

a)

The different ways in which a source operand is denoted in an instruction

b)

The set of hardware registers used by a program

c)

The sequence of micro-operations executed by the control unit

d)

The mapping between opcodes and machine cycles

3.

In the diagram, Register Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

4.

In the diagram, Immediate Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

5.

In the diagram, Direct Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

6.

In the diagram, Register Indirect Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

7.

In the diagram, Based Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

8.

In the diagram, Indexed Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

9.

In the diagram, Based Index Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

10.

In the diagram, String Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

11.

In the diagram, Direct I/O port Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

12.

In the diagram, Indirect I/O port Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

13.

In the diagram, Relative Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

14.

In the diagram, Implied Addressing belongs to which group? Choose from Group I (register and immediate), Group II (memory), Group III (I/O ports), Group IV (relative), Group V (implied).

a)

Group I

b)

Group II

c)

Group III

d)

Group IV

e)

Group V

15.

According to the statement "20 Address lines ⇒ 8086 can address up to memory", what total memory size is indicated by 2202^{20} ?

a)

1M bytes

b)

64K bytes

c)

16M bytes

d)

4G bytes

16.

What is the size of the largest register in the 8086 as described?

a)

8 bits

b)

16 bits

c)

20 bits

d)

32 bits

17.

How is a memory address represented in the 8086 according to the description?

a)

Seg:Offset

b)

Offset:Seg

c)

Linear 32-bit address

d)

Page:Frame

18.

To form the 20-bit physical address, the processor shifts the segment register one hexadecimal place to the left (same as multiplying by 1616 ). What is the next step stated to complete the address?

a)

Add the required offset

b)

Subtract the offset

c)

XOR the segment with the offset

d)

Ignore the offset

19.

Using the example provided, what is the absolute physical address for the memory address 89AB:F012?

a)

98AC2

b)

89AC2

c)

98AB2

d)

97AC2

20.

Which register shown belongs to the Bus Interface Unit (BIU)?

a)

IP

b)

AX

c)

SP

d)

SI

21.

Which of the following is a segment register in the BIU as depicted?

a)

CS

b)

AX

c)

BP

d)

DI

22.

In the example, shifting the segment value one hexadecimal place to the left changes 89AB to 89AB0. What multiplier corresponds to this shift?

a)

22

b)

1010

c)

1616

d)

256256

23.

According to the callout in the figure, what is the size of the contiguous memory block highlighted?

a)

8 bytes

b)

16 bytes

c)

32 bytes

d)

64 bytes

24.

In 8086 direct addressing, the effective address of the memory location where the data operand is stored is described in the instruction. What is this effective address in this addressing mode?

a)

A 16-bit number written directly in the instruction

b)

An offset computed from base and index registers

c)

An immediate constant used as the operand itself

d)

An I/O port number mapped to memory

25.

In the instruction MOV BX, [1354H] shown on the slide, what do the square brackets around 1354H indicate?

a)

The contents of the memory location addressed

b)

The physical address of the segment

c)

A segment register designation

d)

An immediate constant literal

26.

When MOV BX, [1354H] is executed, what is copied into BX?

a)

The contents of the memory location at address 1354H

b)

The value 1354H itself

c)

The current segment base

d)

The instruction pointer value

27.

This addressing mode is called direct because the displacement of the operand from the segment base is specified directly in the instruction. Which statement best explains why it is called direct?

a)

The displacement (offset) is encoded explicitly in the instruction

b)

It always uses both base and index registers

c)

It treats immediate data as the operand without memory access

d)

It selects an I/O port by number rather than a memory address

28.

In the example MOV BL, [0400H] shown on the slide, which destination register receives the data read from memory?

a)

BL

b)

BX

c)

IP

d)

CS

29.

In 8086 register indirect addressing, the instruction specifies the register that holds the effective address. According to the slide, which registers can be used to hold the effective address (EA)?

a)

BX

b)

BP

c)

DI

d)

SI

30.

For register indirect addressing in 8086, the content of which segment register is used for base address calculation?

a)

DS

b)

CS

c)

ES

d)

SS

31.

Consider the example instruction shown: MOV CX, [BX]. Based on the operations listed, what is the effective address?

a)

EA=(BX)EA=(BX)

b)

EA=(CX)EA=(CX)

c)

EA=(DS)×1610EA=(DS)\times 16_{10}

d)

EA=(BP)EA=(BP)

32.

In the operations for register indirect addressing, how is the base address (BA) computed?

a)

BA=(DS)×1610BA=(DS)\times 16_{10}

b)

BA=(ES)×1016BA=(ES)\times 10_{16}

c)

BA=(SS)+(BP)BA=(SS)+(BP)

d)

BA=(CS)×1610BA=(CS)\times 16_{10}

33.

According to the operations listed, what is the formula for the physical memory address (MA)?

a)

MA=BA+EAMA=BA+EA

b)

MA=EA−BAMA=EA-BA

c)

MA=DS+BXMA=DS+BX

d)

MA=SS+BPMA=SS+BP

34.

For the instruction MOV CX, [BX], how are the contents of CX loaded from memory according to the slide?

a)

CL←(MA)CL\leftarrow (MA) and CH←(MA+1)CH\leftarrow (MA+1)

b)

CX←(EA)CX\leftarrow (EA)

c)

AX←(MA)AX\leftarrow (MA)

d)

CH←(MA)CH\leftarrow (MA) and CL←(MA−1)CL\leftarrow (MA-1)

35.

Which addressing mode described uses a register name in the instruction to specify the location that holds the effective address used to access memory data?

a)

Register Indirect Addressing

b)

Immediate Addressing

c)

Direct Addressing

d)

Implied Addressing

36.

In Based Addressing, which registers can hold the base value for the effective address.

a)

BX

b)

BP

c)

SI

d)

DI

37.

In Based Addressing with BX holding the base value of the effective address, which segment register is used to form the 20-bit physical address.

a)

DS

b)

SS

c)

CS

d)

ES

38.

In Based Addressing with BP holding the base value of the effective address, which segment register is used to form the 20-bit physical address.

a)

SS

b)

DS

c)

CS

d)

ES

39.

The displacement specified in Based Addressing can be which of the following sizes and types.

a)

signed 8-bit

b)

unsigned 16-bit

c)

signed 16-bit

d)

unsigned 8-bit

40.

When an 8-bit displacement is used in Based Addressing, what is done to it before adding to the base value.

a)

It is sign extended to 16-bit

b)

It is zero extended to 32-bit

c)

It is truncated to 4-bit

d)

It is rotated right by 1

41.

For the instruction MOV AX, [BX + 08H], which registers contribute to forming the 20-bit physical address.

a)

BX and DS

b)

BP and SS

c)

SI and DS

d)

BX and CS

42.

In the operations for MOV AX, [BX + 08H], the displacement 08H is processed as which value before being added to BX.

a)

0008H (sign extended)

b)

0080H (shifted left)

c)

0008H (zeroed by masking)

d)

08H (unchanged)

43.

When loading a 16-bit value into AX from memory address MA as shown, which memory locations are read.

a)

MA and MA + 1

b)

MA only

c)

MA − 1 only

d)

MA − 1 and MA

44.

In 8086 indexed addressing, which register(s) hold the index value for memory data as described on the slide?

a)

SI only

b)

DI only

c)

SI or DI

d)

BX

45.

According to the slide, how is the effective address (EA) obtained in indexed addressing?

a)

Displacement is added to the base register value

b)

Displacement is added to the index value in SI or DI

c)

Displacement is subtracted from the index value

d)

Index value is multiplied by the segment size

46.

The slide states a rule for 8-bit displacement in indexed addressing. Which statement matches that rule?

a)

It is zero-extended to 32-bit before use

b)

It is sign extended to 16-bit before adding to the base value

c)

It is truncated to 4-bit before addition

d)

It is sign extended to 8-bit and then multiplied by 16

47.

In the example "MOV CX, [SI + 0A2H]" shown on the slide, which register receives the data read from memory?

a)

AX

b)

BX

c)

CX

d)

DX

48.

From the operation steps accompanying the example, which expression gives the base address (BA) derived from the data segment?

a)

BA = (SS) × 16

b)

BA = (ES) × 16

c)

BA = (DS) × 16

d)

BA = (CS) × 16

49.

Based on the operation steps for the example, which description correctly reflects how bytes of CX may be loaded from memory?

a)

(CL) ← (MA) and (CH) ← (MA + 1)

b)

(CH) ← (MA) and (CL) ← (MA + 2)

c)

(CL) ← (MA − 1) and (CH) ← (MA)

d)

(CL) ← (MA + 1) and (CH) ← (MA)

50.

In 8086 string addressing, the effective address of source data is stored in which register?

a)

SI

b)

DI

c)

BX

d)

AX

51.

In 8086 string addressing, the segment register used to calculate the base address of destination data is which one?

a)

ES

b)

DS

c)

CS

d)

SS

52.

For the source memory location in 8086 string addressing, which expression gives the base address?

a)

BA=(DS)×1610BA = (DS) \times 16_{10}

b)

BA=(ES)×1610BA = (ES) \times 16_{10}

c)

BA=(CS)×16BA = (CS) \times 16

d)

BA=(SS)×8BA = (SS) \times 8

53.

In 8086 string addressing, which register holds the effective address of destination data?

a)

DI

b)

SI

c)

BX

d)

BP

54.

In 8086 string addressing, the segment register used to calculate the base address of source data is which one?

a)

DS

b)

ES

c)

CS

d)

SS

55.

Which statement reflects the operation of the MOVS BYTE instruction as shown?

a)

MAE←MAMA_E \leftarrow MA

b)

EA←EAEEA \leftarrow EA_E

c)

MA←MAEMA \leftarrow MA_E

d)

SI←DISI \leftarrow DI

56.

When the direction flag DF=1DF=1 in 8086 string addressing, how do SISI and DIDI change after the operation?

a)

Both decrement by 11

b)

Both increment by 11

c)

SISI increments by 11 while DIDI decrements by 11

d)

SISI stays the same while DIDI decrements by 11

57.

In direct port addressing mode for the 8086, what is specified within the instruction to access an I/O port?

a)

An 8-bit port address

b)

A 16-bit memory address

c)

A register-indirect pointer

d)

A segment base address

58.

According to the example instruction IN AL, [09H], the content of the port at address 09H is moved to which destination?

a)

AL register

b)

AH register

c)

IP register

d)

SP register

59.

Which instruction is shown as the example of direct port addressing mode for reading from an I/O port?

a)

IN AL, [09H]

b)

OUT [09H], AL

c)

IN AX, [09H]

d)

MOV AL, [PORT]

60.

In the operation sequence for IN AL, [09H], what port address is assigned before the read takes place?

a)

09H

b)

0AH

c)

90H

d)

0FH

61.

Which pair of addressing modes is highlighted as Group III for I/O ports on this page?

a)

Direct I/O port addressing and Indirect I/O port addressing

b)

Based addressing and Indexed addressing

c)

Direct addressing and Immediate addressing

d)

String addressing and Implied addressing

62.

In the relative addressing mode of the 8086, the effective address of a program instruction is specified relative to the Instruction Pointer by an 8-bit signed displacement. Which phrase correctly completes this statement?

a)

relative to the Instruction Pointer (IP)

b)

relative to the Code Segment (CS)

c)

relative to the Base Pointer (BP)

d)

relative to an absolute 20-bit physical address

63.

Which example instruction shown for the relative addressing mode uses an 8-bit signed displacement?

a)

MOV AX, BX

b)

JMP 1234H

c)

JZ 0AH

d)

CALL 0FFFH

64.

According to the operations sequence, what is the first step performed on the displacement 0AH?

a)

Add it to CS

b)

Multiply CS by 161016_{10}

c)

Sign extend 0AH0A_H to 000AH000A_H

d)

Clear the Zero Flag

65.

When ZF=1ZF = 1 , how is the effective address (EA) computed in this mode?

a)

EA = (IP) − 000AH000A_H

b)

EA = (IP) + 000AH000A_H

c)

EA = (CS) × 161016_{10}

d)

EA = (BA) + (MA)

66.

In the operations shown, what does the base address (BA) equal?

a)

BA = (IP) + 000AH000A_H

b)

BA = (CS) × 161016_{10}

c)

BA = (EA) − (CS)

d)

BA = (MA) + (EA)

67.

In the operations shown, how is the memory address (MA) obtained?

a)

MA = BA − EA

b)

MA = EA − BA

c)

MA = BA + EA

d)

MA = CS × 161016_{10}

68.

What happens when ZF=1ZF = 1 during execution in this addressing mode?

a)

The program control jumps to the new address calculated above

b)

The program halts

c)

The next instruction of the program is executed

d)

The displacement is ignored

69.

What happens when ZF=0ZF = 0 during execution in this addressing mode?

a)

The program control jumps to the new address calculated above

b)

The next instruction of the program is executed

c)

The instruction is re-fetched

d)

The processor clears the IP

70.

In 8086, which addressing mode is described as having instructions with no operands, where the instruction itself specifies the data to be operated?

a)

Register Addressing

b)

Immediate Addressing

c)

Implied Addressing

d)

Indexed Addressing

71.

According to the example provided for implied addressing, what operation does the instruction CLC perform?

a)

Sets the carry flag to one

b)

Clears the carry flag to zero

c)

Complements all bits in the accumulator

d)

Clears the zero flag

72.

Which statement accurately characterizes the implied addressing mode in the 8086?

a)

Operands are stored in registers explicitly named in the instruction

b)

The instruction includes immediate data as an explicit operand

c)

The instruction itself implies the operand and operates without explicit operands

d)

Operands are accessed using an index register combined with a displacement

73.

Refer to the slide titled Instruction Set. According to the slide, how many types of instructions does the 8086 support?

a)

4

b)

5

c)

6

d)

7

74.

Refer to the slide titled Instruction Set. Which of the following appears in the list of 8086 instruction types?

a)

Data Transfer Instructions

b)

Floating-point Instructions

c)

Graphical Instructions

d)

Cache Control Instructions

75.

Refer to the slide titled Instruction Set. Which instruction type name indicates operations such as addition or subtraction?

a)

Arithmetic Instructions

b)

Data Transfer Instructions

c)

Control Transfer Instructions

d)

String manipulation Instructions

76.

Refer to the slide titled Instruction Set. Which instruction type name indicates Boolean operations such as AND or OR?

a)

Logical Instructions

b)

Process Control Instructions

c)

Control Transfer Instructions

d)

Data Transfer Instructions

77.

Refer to the slide titled Instruction Set. Which of the following is not listed among the six 8086 instruction types on the slide?

a)

Memory Management Instructions

b)

String manipulation Instructions

c)

Process Control Instructions

d)

Control Transfer Instructions

78.

Data Transfer Instructions are used to transfer data/address into registers, memory locations and I/O ports.

a)

They transfer data/address into registers, memory locations and I/O ports.

b)

They generate control signals for peripheral devices only.

c)

They perform arithmetic operations on operands.

d)

They control program flow through jumps and calls.

79.

Data Transfer Instructions generally involve two operands: Source operand and Destination operand of the same size.

a)

One operand with implicit destination

b)

Two operands of the same size

c)

Three operands: source, destination, and index

d)

A variable number of operands depending on instruction

80.

In Data Transfer Instructions, the Source can be a register or a memory location or an immediate data.

a)

Register

b)

Memory location

c)

Immediate data

d)

I/O port

81.

In Data Transfer Instructions, the Destination is a register or a memory location.

a)

Register

b)

Memory location

c)

Immediate data

d)

I/O port

82.

For Data Transfer Instructions, the size should be either a byte or a word.

a)

A nibble or a byte

b)

A byte or a word

c)

A word or a doubleword

d)

Any size is allowed

83.

An 8-bit data can only be moved to 8-bit register/memory.

a)

Only 8-bit register/memory

b)

Only 16-bit register/memory

c)

Either 8-bit or 16-bit register/memory

d)

Only I/O ports

84.

A 16-bit data can be moved to 16-bit register/memory.

a)

Only 16-bit register/memory

b)

Only 8-bit register/memory

c)

Either 8-bit or 16-bit register/memory

d)

It cannot be moved

85.

According to the 8086 data transfer instructions chart, which mnemonics are explicitly listed under Data Transfer Instructions?

a)

MOV

b)

XCHG

c)

PUSH

d)

POP

e)

IN

86.

In the form MOV reg2, reg1, what is the effect on operands as shown in the chart?

a)

(reg2) ← (reg1)

b)

(reg1) ← (reg2)

c)

(reg2) ↔ (reg1)

d)

(mem) ← (reg1)

87.

For the instruction form MOV mem, reg1, which operation is indicated?

a)

(mem) ← (reg1)

b)

(reg1) ← (mem)

c)

(reg2) ← (reg1)

d)

(reg2) ↔ (reg1)

88.

According to the chart, what does MOV reg2, mem accomplish?

a)

(reg2) ← (mem)

b)

(mem) ← (reg2)

c)

(reg1) ← (mem)

d)

(mem) ↔ (reg2)

89.

Which instruction form is used to load immediate data into a register, as shown?

a)

MOV reg, data

b)

MOV mem, data

c)

XCHG reg2, reg1

d)

PUSH reg

90.

What is the effect of the form MOV mem, data in the chart?

a)

(mem) ← data

b)

data ← (mem)

c)

(reg) ← data

d)

(mem) ↔ data

91.

For XCHG reg2, reg1, what operation is depicted?

a)

(reg2) ↔ (reg1)

b)

(reg2) ← (reg1)

c)

(reg1) ← (reg2)

d)

(mem) ← (reg1)

92.

Which statement matches the form XCHG mem, reg1 shown in the chart?

a)

(mem) ↔ (reg1)

b)

(mem) ← (reg1)

c)

(reg1) ← (mem)

d)

(mem) ← data